3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-07-20 22:25:49 +00:00
Commit graph

304 commits

Author SHA1 Message Date
Emil J. Tywoniak
71e6e31795 ast, flatten, hierarchy: canonically split hierarchical references into twines 2026-06-23 10:53:35 +02:00
Emil J. Tywoniak
bffe7a6e57 WIP migration to twine 2026-06-18 21:54:57 +02:00
Emil J. Tywoniak
3a5f5c77bf twine: avoid TwinePool::lookup 2026-06-16 22:57:13 +02:00
Emil J. Tywoniak
dcc74755e7 WIP 2026-06-15 11:26:09 +02:00
Emil J. Tywoniak
d22805bd47 WIP 2026-06-12 16:25:07 +02:00
Emil J. Tywoniak
c3ffbf6fae WIP 2026-06-12 00:18:53 +02:00
Emil J. Tywoniak
afdae7b87e WIP 2026-06-11 20:02:02 +02:00
Emil J. Tywoniak
8e522b08c0 WIP 2026-06-11 13:17:54 +02:00
Emil J. Tywoniak
f592f2f3af WIP 2026-06-10 19:22:53 +02:00
Emil J. Tywoniak
d13dfc21f4 WIP 2026-06-10 14:54:48 +02:00
Emil J. Tywoniak
ca632e82c4 rtlil: set Module* on inner-process AttrObjects at construction 2026-06-10 14:54:12 +02:00
Emil J. Tywoniak
f1edb571f2 rtlil: evacuate src_id_ from AttrObject to per-Design meta vector 2026-06-10 14:54:05 +02:00
Emil J. Tywoniak
e70eed3296 rtlil: add Module* back-pointer to RTLIL::Memory 2026-06-10 14:53:59 +02:00
Emil J. Tywoniak
3424c00cd0 twine 2026-06-10 14:53:45 +02:00
Codexplorer
e41b969da2 Refactored uses of log_id() 2026-05-08 20:59:24 -07:00
Christopher D. Leary
390f09b89a Support positional assignment patterns for unpacked arrays 2026-04-23 14:29:38 -07:00
Petter Reinholdtsen
a89e8fd869 Fixed spelling error in message of frontends/ast/genrtlil.cc.
Patch by Ruben Undheim via the Debian project.  The patch originated
as 0009-Some-spelling-errors-fixed.patch and was dated 2018-07-12
there.

See also issue #5805.
2026-04-22 04:30:18 +02:00
Emil J. Tywoniak
ad7a776d73 genrtlil: even faster removeSignalFromCaseTree 2026-03-18 23:33:35 +01:00
Emil J. Tywoniak
23ce4b8560 genrtlil: faster removeSignalFromCaseTree 2026-03-18 23:33:35 +01:00
likeamahoney
e9442194f2 support automatic lifetime qualifier on procedural variables 2026-02-27 20:42:52 +03:00
Martin Povišer
f67d4bcfa4 verilog: Do not set module_not_derived on internal cells 2026-01-19 16:48:13 -08:00
N. Engelhardt
45d654e2d7 avoid merging formal properties 2025-12-17 20:25:24 +01:00
Robert O'Callahan
a1141f1a4c Remove some unnecessary .c_str() calls to the result of unescape_id() 2025-09-16 23:12:14 +00:00
Robert O'Callahan
d276529d46 Remove .c_str() calls from parameters to log_file_info() 2025-09-16 23:06:28 +00:00
Robert O'Callahan
548deba259 Remove .c_str() calls from parameters to log_file_warning() 2025-09-16 23:03:45 +00:00
Robert O'Callahan
5ac6858f26 Remove .c_str() from log_cmd_error() and log_file_error() parameters 2025-09-16 22:59:08 +00:00
Robert O'Callahan
f65ca488ec Update frontends to avoid bits() 2025-09-16 03:17:23 +00:00
Jannis Harder
193b057983
Merge pull request #5341 from rocallahan/more-varargs-conversion
More varargs conversion
2025-09-12 18:09:42 +02:00
Robert O'Callahan
733b6f0124 Remove unnecessary usage of .c_str() in parameters to input_error() 2025-09-12 06:03:05 +00:00
Robert O'Callahan
e0ae7b7af4 Remove .c_str() calls from log()/log_error()
There are some leftovers, but this is an easy regex-based approach that removes most of them.
2025-09-11 20:59:37 +00:00
Robert O'Callahan
c7df6954b9 Remove .c_str() from stringf parameters 2025-09-01 23:34:42 +00:00
Emil J. Tywoniak
25d2a8ce3a simplify: simplify 2025-08-11 13:34:10 +02:00
Krystine Sherwin
9b882c32c1 frontends/ast: More usage of auto
For consistency.
2025-08-11 13:34:10 +02:00
Emil J. Tywoniak
ecec9a760b ast, read_verilog: unify location types, reduce filename copying 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak
8bf750ecbb neater errors, lost in the sauce of source 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak
b3bf588966 ast, read_verilog: refactoring 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak
84f0c5da73 ast: fix new memory safety bugs from rebase 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak
c8e0ac0c61 ast, read_verilog: ownership in AST, use C++ styles for parser and lexer 2025-08-11 13:34:10 +02:00
Rahul Bhagwat
b776283d79
implement package import 2025-08-03 23:31:54 -04:00
Emil J. Tywoniak
5e72464a15 rtlil: enable single-bit vector wires 2025-05-12 13:23:29 +02:00
Krystine Sherwin
1de5d98ae2
Reduce comparisons of size_t and int
`Const::size()` returns int, so change iterators that use it to `auto` instead of `size_t`.
For cases where size is being explicitly cast to `int`, use the wrapper that we already have instead: `Yosys::GetSize()`.
2024-11-29 12:53:29 +13:00
Emil J. Tywoniak
785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
KrystalDelusion
c3ae33da33
Merge pull request #4285 from YosysHQ/typo_fixup
Typo fixing
2024-04-25 09:54:48 +12:00
Catherine
a5441bc00c fmt: FmtPart::{STRING→LITERAL},{CHARACTER→STRING}.
Before this commit, the `STRING` variant inserted a literal string;
the `CHARACTER` variant inserted a string. This commit renames them
to `LITERAL` and `STRING` respectively.
2024-04-02 12:13:22 +02:00
Krystine Sherwin
3eeefd23e3
Typo fixup(s) 2024-03-18 11:09:23 +13:00
Dag Lem
39fea32c6e Add support for packed multidimensional arrays
* Generalization of dimensions metadata (also simplifies $size et al.)
* Parsing and elaboration of multidimensional packed ranges
2024-02-11 11:26:52 -05:00
Catherine
c7bf0e3b8f Add new $check cell to represent assertions with a message. 2024-02-01 20:10:39 +01:00
Catherine
1159e48721 write_verilog: emit initial $display correctly. 2024-01-11 13:13:04 +01:00
Dag Lem
cda470d63e Respect the sign of the right operand of AST_SHIFT and AST_SHIFTX
The $shift and $shiftx cells perform a left logical shift if the second
operand is negative. This change passes the sign of the second operand
of AST_SHIFT and AST_SHIFTX into $shift and $shiftx cells, respectively.
2023-12-11 18:58:34 +01:00
Martin Povišer
a511976b48 ast/simplify: Retire in_lvalue/in_param arguments to simplify 2023-09-26 13:32:15 +02:00