mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-10 08:03:26 +00:00
Code Activity
12742 commits 109 branches 55 tags 45 MiB
Commit graph

3 commits

Author SHA1 Message Date
N. Engelhardt
e230a871be synth_quicklogic: rearrange files to prepare for adding more architectures 2023-11-27 08:37:33 +01:00
Lofty
dce037a62c quicklogic: ABC9 synthesis 2021-04-17 20:54:58 +02:00
Lofty
f4298b057a quicklogic: PolarPro 3 support 
Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
 2021-03-18 13:28:16 +01:00