Emil J
7b9f79d6d1
Merge 26e293d71f into d0a41d4f58
2025-11-03 10:04:14 +01:00
Miodrag Milanović
d0a41d4f58
Merge pull request #5442 from rocallahan/verific-bus-ports
...
Set `port_id` for Verific `PortBus` wires
2025-11-03 10:04:07 +01:00
Emil J. Tywoniak
26e293d71f
proc_mux: default to case src when action src is missing
2025-11-02 12:42:04 +01:00
Emil J. Tywoniak
0c8e008ce7
proc_mux: add src test
2025-11-02 12:42:04 +01:00
Emil J. Tywoniak
f9c528e981
docs: word_mux grammar
2025-11-02 12:42:04 +01:00
Emil J. Tywoniak
2db4208ca5
proc_mux: refactor
2025-11-02 12:42:04 +01:00
Emil J. Tywoniak
d762c5f5e8
proc_mux: emit fused action location src attributes on procmuxes
2025-11-02 11:26:45 +01:00
Emil J. Tywoniak
304757c881
rtlil: add source tracking to CaseRule actions
2025-11-02 11:25:42 +01:00
Emil J. Tywoniak
c45a035ebf
gowin: lower LUT count sensitivity
2025-11-02 11:22:48 +01:00
Emil J. Tywoniak
b5e5554553
verilog: fix case location
2025-11-02 11:22:33 +01:00
Emil J. Tywoniak
1eb696c786
rtlil: replace SigSig actions with new type SyncAction
2025-11-02 11:22:03 +01:00
github-actions[bot]
797780eda5
Bump version
2025-11-02 00:26:19 +00:00
Emil J
dc051e98be
Merge pull request #5450 from YosysHQ/emil/dff-next_state-reset-pol-fix
...
dfflibmap: fix next_state inversion propagation for DFF flops by inve…
2025-11-01 18:13:12 +01:00
Krystine Sherwin
a243e4e60f
Docs: ecp5 and nexus are under lattice
2025-11-01 07:37:58 +00:00
github-actions[bot]
4011d72656
Bump version
2025-10-30 00:24:42 +00:00
Emil J
c9a4c608ce
Merge pull request #5446 from rocallahan/avoid-moved-from
...
Don't recompute hash using moved-out-of value
2025-10-29 16:16:57 +01:00
Miodrag Milanović
7f6ea39507
Merge pull request #5449 from yrabbit/adc-5
...
Gowin. Fix GW5A ADCs.
2025-10-29 11:11:47 +01:00
YRabbit
2a3720921c
Gowin. Fix GW5A ADCs.
...
For these primitives, Gowin decided to use a different option for
describing ports—directly in the module header, i.e.
``` verilog
module ADC(input CLK);
```
instead of
``` verilog
module ADC(CLK);
input CLK;
```
Since this one-time parser becomes too confusing, it is easier to simply
add ADC descriptions as they are from a separate file, especially since
these primitives are only available in the GW5A series.
Test:
``` shell
yosys -p "read_verilog top.v; synth_gowin -json top-synth.json -family gw5a"
```
The old version of Yosys simply won't compile the design due to the lack
of port descriptions, while the new version will compile without errors.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2025-10-29 12:48:21 +10:00
github-actions[bot]
75eff54b31
Bump version
2025-10-29 00:24:43 +00:00
Emil J. Tywoniak
b2fe335b2d
dfflibmap: fix next_state inversion propagation for DFF flops by inverting reset value polarity
2025-10-28 13:56:28 +01:00
Miodrag Milanović
3b9f06c130
Merge pull request #5447 from pu-cc/gatemate-fix-serdes-cdr
...
gatemate: fix SERDES CDR parameters
2025-10-28 09:54:13 +01:00
Robert O'Callahan
a27b1a83ae
Don't recompute hash using moved-out-of value
2025-10-28 07:41:10 +00:00
Patrick Urban
14c1802b01
gatemate: fix SERDES CDR parameters
2025-10-27 15:47:48 +01:00
github-actions[bot]
8bc63ef6da
Bump version
2025-10-26 00:25:16 +00:00
YRabbit
3956f103a9
Gowin. Handle the WRITE_MODE.
...
Process the WRITE_MODE in the GW5A series in a more concise manner.
You can check it in the same way as in
https://github.com/YosysHQ/yosys/pull/5440
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2025-10-25 23:15:23 +01:00
github-actions[bot]
f5c9e122de
Bump version
2025-10-24 00:21:47 +00:00
Robert O'Callahan
25aafab86b
Set port_id for Verific PortBus wires
2025-10-23 20:51:53 +00:00
YRabbit
64700dec65
Gowin. Disable unsupported BSRAM mode in GW5A
...
All supported (and planned to be supported) GW5A series chips do not
support the 2: Read-before-Write write mode.
Here, we prohibit the generation of BSRAM with this mode.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2025-10-23 09:59:56 +01:00
Miodrag Milanović
2613c1c0a9
Merge pull request #5438 from cr1901/posix-bugpoint
...
Add sys/wait.h header to bugpoint to bring in constants.
2025-10-22 12:40:26 +02:00
github-actions[bot]
37875fdedf
Bump version
2025-10-21 00:23:46 +00:00
William D. Jones
311a2739f6
Add sys/wait.h header to bugpoint to bring in constants.
2025-10-20 19:50:18 -04:00
Jannis Harder
f6fb423ee8
Merge pull request #5430 from YosysHQ/micko/sim_cycle_width
...
sim: Make cycle width small as possible and configurable
2025-10-20 18:51:32 +02:00
Jannis Harder
6a0ee6e4fb
Revert sim's cycle_width default back to 10, but keep -width option
2025-10-20 14:40:05 +02:00
github-actions[bot]
1598771a37
Bump version
2025-10-19 00:26:17 +00:00
Mohamed Gaber
b510c36162
hotfix: headers mistakenly added to clean target
...
- fix `make clean` deleting a number of headers when ENABLE_PYOSYS is set to 1
2025-10-18 14:08:20 +01:00
github-actions[bot]
272aa9cde2
Bump version
2025-10-17 00:23:40 +00:00
Maxim Kudinov
6535995005
synth_gowin: fix help hint style
2025-10-16 11:09:28 +01:00
Maxim Kudinov
8c347826f6
synth_gowin: make help description more clear
2025-10-16 11:09:28 +01:00
Maxim Kudinov
8f6d63c082
synth_gowin: make setundef an off by default option
2025-10-16 11:09:28 +01:00
Miodrag Milanovic
f11a61b32b
sim: Make cycle width small as possible and configurable
2025-10-16 11:37:44 +02:00
Miodrag Milanovic
db8c1878a0
fix dlopen using fs:path with mingw
2025-10-16 08:30:43 +02:00
github-actions[bot]
061b6ce2ad
Bump version
2025-10-16 00:23:57 +00:00
Miodrag Milanović
759996b968
Merge pull request #5427 from donn/plugin_search_paths
...
plugins: add search paths
2025-10-15 20:02:05 +02:00
Emil J
9d21585a4c
Merge pull request #5426 from rocallahan/parse-sigspec
...
Don't stop parsing sigspec after a {} group.
2025-10-15 17:31:11 +02:00
Mohamed Gaber
dce70abd94
plugins: support Windows path delimiters
2025-10-15 15:53:44 +03:00
Mohamed Gaber
e86797f029
plugins: add search path
...
This uses the environment variable `YOSYS_PLUGIN_PATH` to provide multiple colon-delimited search paths for native plugins in a similar manner to `PATH` for executables and `PYTHONPATH` for Python modules.
This addresses https://github.com/YosysHQ/yosys/issues/2545 , allowing Yosys to be better packaged in non-FHS environments such as Nix.
2025-10-15 14:13:25 +03:00
github-actions[bot]
4970ad5a18
Bump version
2025-10-15 00:23:49 +00:00
Robert O'Callahan
e099a7d34a
Don't stop parsing sigspec after a {} group.
...
Resolves #5424
2025-10-14 21:18:58 +00:00
Miodrag Milanović
2e3bfca294
Merge pull request #5419 from YosysHQ/micko/verific_fix_nocolumns
...
verific: Fix error compiling without VERIFIC_LINEFILE_INCLUDES_COLUMNS
2025-10-14 17:05:31 +02:00
Miodrag Milanović
a89c5b97d8
Merge pull request #5423 from YosysHQ/update_abc
...
Update abc
2025-10-14 17:05:13 +02:00
