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									 Johann Glaser | 6c4cbc03c2 | Added support for notif0/notif1 primitives | 2013-08-20 11:23:59 +02:00 |  | 
				
					
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									 Clifford Wolf | 8656b1c08f | Added support for bufif0/bufif1 primitives | 2013-08-19 19:50:04 +02:00 |  | 
				
					
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									 Clifford Wolf | 4214561890 | Improved ast dumping (ast/verilog frontend) | 2013-08-19 19:49:14 +02:00 |  | 
				
					
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									 Clifford Wolf | 00a6c1d9a5 | Major redesign of expr width/sign detecion (verilog/ast frontend) | 2013-07-09 14:31:57 +02:00 |  | 
				
					
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									 Clifford Wolf | 56432a920f | Added defparam support to Verilog/AST frontend | 2013-07-04 14:12:33 +02:00 |  | 
				
					
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									 Clifford Wolf | 0c6ffc4c65 | More fixes for bugs found using xsthammer | 2013-06-13 11:18:45 +02:00 |  | 
				
					
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									 Clifford Wolf | 4b311b7b99 | Further improved and extended xsthammer | 2013-06-11 19:49:35 +02:00 |  | 
				
					
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									 Clifford Wolf | db98a18edb | Enabled AST/Verilog front-end optimizations per default | 2013-06-10 13:19:04 +02:00 |  | 
				
					
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									 Clifford Wolf | 46fbe9d262 | Added SAT generator and simple sat_solve command | 2013-06-07 13:59:13 +02:00 |  | 
				
					
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									 Johann Glaser | 10a195c0a1 | added option '-Dname[=definition]' to command 'read_verilog' | 2013-05-19 17:07:52 +02:00 |  | 
				
					
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									 Clifford Wolf | b56e06d2f5 | Added support for verilog === operator | 2013-05-07 14:35:40 +02:00 |  | 
				
					
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									 Clifford Wolf | 161565be10 | Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS) | 2013-03-31 11:19:11 +02:00 |  | 
				
					
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									 Clifford Wolf | 7bfc7b61a8 | Implemented proper handling of stub placeholder modules | 2013-03-28 09:20:10 +01:00 |  | 
				
					
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									 Clifford Wolf | 7a99349de4 | Improvements and bugfixes for generate blocks with local signals | 2013-03-26 11:31:34 +01:00 |  | 
				
					
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									 Clifford Wolf | df9753d398 | Added mem2reg option to verilog frontend | 2013-03-24 11:13:32 +01:00 |  | 
				
					
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									 Clifford Wolf | e45d1c8865 | Tiny fixes to verilog parser | 2013-03-23 18:54:31 +01:00 |  | 
				
					
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									 Clifford Wolf | 8a6b0a3520 | Added help messages to ilang and verilog frontends | 2013-03-01 08:03:00 +01:00 |  | 
				
					
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									 Clifford Wolf | a321a5c412 | Moved stand-alone libs to libs/ directory and added libs/subcircuit | 2013-02-27 09:32:19 +01:00 |  | 
				
					
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									 Clifford Wolf | 4f0c2862a0 | Added support for verilog genblock[index].member syntax | 2013-02-26 13:18:22 +01:00 |  | 
				
					
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									 Clifford Wolf | 6d1502b948 | Added support for "always @(*)" | 2013-01-16 17:32:11 +01:00 |  | 
				
					
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									 Clifford Wolf | 6543917fb8 | added .gitignore files | 2013-01-05 11:19:11 +01:00 |  | 
				
					
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									 Clifford Wolf | 7764d0ba1d | initial import | 2013-01-05 11:13:26 +01:00 |  |