2414 commits

This branch

This branch

All branches

Author	SHA1	Message	Date
Clifford Wolf	6176f4d081	Fixed multi-level prefix resolving	2015-09-22 20:52:02 +02:00
Clifford Wolf	4b8200eb49	Fixed segfault on invalid verilog constant 1'b_	2015-09-22 08:13:09 +02:00
Clifford Wolf	405cf67b64	Fixed emcc build	2015-09-21 12:33:36 +02:00
Clifford Wolf	b66bf8bed1	Do not detect fsm state registers with init attribute	2015-09-21 11:54:00 +02:00
Clifford Wolf	11c27b5e69	Bugfix in "qwp" pass	2015-09-21 10:37:24 +02:00
Clifford Wolf	80898dcbc8	Improvements and fixes in "qwp" pass	2015-09-21 01:05:13 +02:00
Clifford Wolf	6329bea873	Added "qwp -dump"	2015-09-20 22:36:35 +02:00
Clifford Wolf	539c5eeb0f	Added "qwp" command	2015-09-20 18:28:46 +02:00
Andrew Zonenberg	c469f22144	Improvements to $display system task	2015-09-19 10:33:37 +02:00
Clifford Wolf	598a475724	Added nlutmap	2015-09-18 21:57:34 +02:00
Clifford Wolf	c851f51656	Added lut2mux pass	2015-09-18 21:55:48 +02:00
Clifford Wolf	d212d4d0c1	Cosmetic fix in Module::addLut()	2015-09-18 21:55:12 +02:00
Clifford Wolf	db548800b6	Added buffer detection to "abc -lut"	2015-09-18 20:12:56 +02:00
Clifford Wolf	745d56149d	Renamed GreenPAK4 cells, improved GP4 DFF mapping	2015-09-18 12:00:37 +02:00
Clifford Wolf	452d4bf741	Added support for "dfflibmap -liberty +/..."	2015-09-18 11:55:57 +02:00
Clifford Wolf	51e1295d79	Added detection of "mux inverter" chains in opt_const	2015-09-18 11:55:31 +02:00
Clifford Wolf	b7535a6c75	Added $logic_not handling to fsm_detect	2015-09-18 10:46:50 +02:00
Clifford Wolf	c89ceee219	Added $finish and $display to README	2015-09-18 10:01:08 +02:00
Clifford Wolf	7a230d3a8d	Merge branch 'feat-finish-disp'	2015-09-18 09:54:49 +02:00
Clifford Wolf	9db05d17fe	Added AST_INITIAL checks for $finish and $display	2015-09-18 09:50:57 +02:00
Andrew Zonenberg	7141f65533	Initial implementation of $display()	2015-09-18 09:36:46 +02:00
Andrew Zonenberg	e446e651cb	Initial implementation of $finish()	2015-09-18 09:30:25 +02:00
Clifford Wolf	d9cecabb87	Fixed copy&paste typo in synth_greenpak4	2015-09-16 09:39:31 +02:00
Clifford Wolf	c5352f45c3	Added GreenPAK4 skeleton	2015-09-16 09:28:37 +02:00
Clifford Wolf	e7c018e5d1	Fixed sharing of $memrd cells	2015-09-12 16:01:20 +02:00
Clifford Wolf	99ccb3180d	Fixed ice40 handling of negclk RAM40	2015-09-10 17:35:19 +02:00
Clifford Wolf	6f9a6fd783	Fixed port ordering in "splitnets" cmd	2015-09-01 13:10:36 +02:00
Clifford Wolf	b10ea0550d	gcc-4.6 build fixes	2015-09-01 12:51:23 +02:00
Andrei Errapart	522176c946	Removed unnecessary cast.	2015-09-01 12:40:36 +02:00
Andrei Errapart	09176bcf3f	Microsoft Visual C++ fixes in hashlib; template specializations on int32_t and int64_t.	2015-09-01 12:40:24 +02:00
Andrei Errapart	744a5333f5	Microsoft Visual C++ fix for log.h.	2015-09-01 12:40:12 +02:00
Clifford Wolf	24e7cf89bc	Fixed iopadmap help message	2015-08-31 16:49:42 +02:00
Clifford Wolf	ee8f6f31f4	Added SigMap::allbits()	2015-08-31 16:42:19 +02:00
Clifford Wolf	92dce21f6e	Using dict<> and pool<> in alumacc pass	2015-08-31 16:26:01 +02:00
Clifford Wolf	09b51cb375	Added "yosys-smt2-wire" tag support to smt2 back-end	2015-08-31 02:05:58 +02:00
Clifford Wolf	eb38722e98	Fixed handling of memory read without address	2015-08-22 14:46:42 +02:00
Clifford Wolf	c475deec6c	Switched to Python 3	2015-08-22 09:59:33 +02:00
Clifford Wolf	f40d1b78b6	Added sat -show-regs, -show-public, -show-all	2015-08-18 17:14:30 +02:00
Clifford Wolf	246e362717	Bugfix in fsm_detect for complex muxtrees	2015-08-18 14:17:50 +02:00
Clifford Wolf	f43815054e	Properly clean up unused "init" attributes	2015-08-18 13:50:15 +02:00
Clifford Wolf	a7ab9172f9	Small corrections to const2ast warning messages	2015-08-17 16:22:53 +02:00
Florian Zeitz	0491042849	Check base-n literals only contain valid digits	2015-08-17 15:37:33 +02:00
Florian Zeitz	64ccbf8510	Warn on literals exceeding the specified bit width	2015-08-17 15:27:35 +02:00
Clifford Wolf	b7cb5e281f	Merge pull request #72 from cseed/master ... Added .travis.yml.	2015-08-17 08:33:46 +02:00
Cotton Seed	8eebb67049	Added .travis.yml.	2015-08-17 00:35:43 -04:00
Clifford Wolf	9596fe74de	Another bugfix for ice40 and xilinx brams_init make rules	2015-08-16 21:39:34 +02:00
Clifford Wolf	aedcfd6fd3	Fixed Makefile rules for generated share files	2015-08-16 21:15:07 +02:00
Clifford Wolf	d5b1a90b33	Added $tribuf and $_TBUF_ sim models	2015-08-16 13:05:32 +02:00
Clifford Wolf	9c33172ece	Added tribuf command	2015-08-16 12:55:25 +02:00
Clifford Wolf	ff50bc2ac3	Added $tribuf and $_TBUF_ cell types	2015-08-16 12:54:52 +02:00