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Author SHA1 Message Date
Eddie Hung
5f97086302 Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2020-01-02 15:14:12 -08:00
whitequark
f8d5920a7e
Merge pull request #1604 from whitequark/unify-ram-naming 
Harmonize BRAM/LUTRAM descriptions across all of Yosys
 2020-01-02 21:06:17 +00:00
Clifford Wolf
ef6548203c
Merge pull request #1609 from YosysHQ/clifford/fix1596 
Always create $shl, $shr, $sshl, $sshr cells with unsigned B inputs
 2020-01-02 19:57:27 +01:00
Clifford Wolf
3edb2e708b Always create $shl, $shr, $sshl, $sshr cells with unsigned B inputs 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2020-01-02 18:58:45 +01:00
Eddie Hung
d6242be802
Merge pull request #1601 from YosysHQ/eddie/synth_retime 
"abc -dff" to no longer retime by default
 2020-01-02 08:46:24 -08:00
Eddie Hung
a8f6688888
Merge pull request #1608 from YosysHQ/eddie/ifndef_YOSYS 
ifdef __ICARUS__ -> ifndef YOSYS
 2020-01-02 08:46:02 -08:00
Eddie Hung
3d98a96273 ifdef __ICARUS__ -> ifndef YOSYS 2020-01-01 17:33:10 -08:00
Eddie Hung
9e5ff30d05
Merge pull request #1606 from YosysHQ/eddie/improve_tests 
Fix a few issues in tests/arch/*
 2020-01-01 13:31:46 -08:00
Eddie Hung
52fe1e0c44 Revert insertion of 'reg', leave note behind 2020-01-01 09:05:46 -08:00
Miodrag Milanović
6620b4e94e
Merge pull request #1605 from YosysHQ/iopad_fix 
iopad mapping should take care of existing io buffers
 2020-01-01 17:46:45 +01:00
Eddie Hung
3deec51ddc Fix anlogic async flop mapping 2020-01-01 08:43:16 -08:00
Miodrag Milanovic
a1344ec06e Added a test case 2020-01-01 16:24:30 +01:00
Miodrag Milanovic
e0c879684f take skip wire bits into account 2020-01-01 16:13:14 +01:00
whitequark
550310e264 Harmonize BRAM/LUTRAM descriptions across all of Yosys. 
This commit:
  * renames all remaining instances of "DRAM" (which is ambiguous)
    to "LUTRAM" (which is not), finishing the work started in
    the commit 698ab9be;
  * renames memory rule files to brams.txt/lutrams.txt;
  * adds/renames script labels map_bram/map_lutram;
  * extracts where necessary script labels map_ffram and map_gates;
  * adds where necessary options -nobram/-nolutram.

The end result is that BRAM/LUTRAM/FFRAM aspects of every target
are now consistent with each other.

Per architecture:
  * anlogic: rename drams.txt→lutrams.txt, add -nolutram, add
    :map_lutram, :map_ffram, :map_gates
  * ecp5: rename bram.txt→brams.txt, lutram.txt→lutrams.txt
  * efinix: rename bram.txt→brams.txt, add -nobram, add :map_ffram,
    :map_gates
  * gowin: rename bram.txt→brams.txt, dram.txt→lutrams.txt,
    rename -nodram→-nolutram (-nodram still recognized), rename
    :bram→:map_bram, :dram→:map_lutram, add :map_ffram, :map_gates
 2020-01-01 12:30:00 +00:00
Eddie Hung
713484fa66 Do not do call equiv_opt when no sim model exists 2019-12-31 18:40:30 -08:00
Eddie Hung
a59016b146 Fix warnings 2019-12-31 18:40:11 -08:00
Eddie Hung
c082329af3 Call equiv_opt with -multiclock and -assert 2019-12-31 18:39:32 -08:00
Eddie Hung
d597e3e979 Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor 2019-12-30 23:10:08 -08:00
Eddie Hung
dacdc6cc94 Remove abc9 -clk option 2019-12-30 22:59:14 -08:00
Eddie Hung
f1bf44ae8f abc9_ops -prep_dff cope with lack of holes module 2019-12-30 22:58:39 -08:00
Eddie Hung
a367f703ea Rename struct 2019-12-30 22:56:19 -08:00
Eddie Hung
7997e2a90f Get rid of holes_mode 2019-12-30 20:15:09 -08:00
Eddie Hung
fad99c2ec7 Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor 2019-12-30 20:14:24 -08:00
Eddie Hung
0c4be94a02 Add -D DFF_MODE to abc9_map test 2019-12-30 20:13:25 -08:00
Eddie Hung
b42b64e8ed Move Pass::call() out of abc9_ops into abc9 2019-12-30 19:23:54 -08:00
Eddie Hung
88334cab89 Cleanup 2019-12-30 18:49:33 -08:00
Eddie Hung
52f649dcfd Use function arg 2019-12-30 18:47:06 -08:00
Eddie Hung
0317a2b476 holes_module to be whitebox 2019-12-30 18:46:22 -08:00
Eddie Hung
65baefecd3 Rid unnecessary if 2019-12-30 18:26:35 -08:00
Eddie Hung
e2bbe33a88 Get rid of holes_mode 2019-12-30 18:24:29 -08:00
Eddie Hung
b50de28c04 Add abc9_ops -prep_holes 2019-12-30 18:00:49 -08:00
Eddie Hung
16c4ec7eda Add abc9_ops -prep_dff 2019-12-30 16:36:33 -08:00
Eddie Hung
88b9c8d46d Restore count_outputs, move process check to abc 2019-12-30 16:29:08 -08:00
Eddie Hung
dbffbeef5c Fix struct name 2019-12-30 16:21:20 -08:00
Eddie Hung
7649ec72c9 Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor 2019-12-30 16:20:58 -08:00
Eddie Hung
4c3f517425 Remove delay targets doc 2019-12-30 16:11:42 -08:00
Eddie Hung
658f424d7d Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor 2019-12-30 16:01:38 -08:00
Eddie Hung
0735572934 write_xaiger to use scratchpad for stats; cleanup abc9 2019-12-30 15:35:33 -08:00
Eddie Hung
22fe931c86 Grammar 2019-12-30 15:07:15 -08:00
Eddie Hung
fc4b8b8991 Remove submod changes 2019-12-30 14:56:14 -08:00
Eddie Hung
543bd2de6c Update timings for Xilinx S7 cells 2019-12-30 14:36:07 -08:00
Eddie Hung
d1fccd5a2d Remove unused 2019-12-30 14:35:52 -08:00
Eddie Hung
eb4e767053 Do not offset FD* box timings due to -46ps Tsu 2019-12-30 14:35:10 -08:00
Eddie Hung
3cbbae251f Call "proc" if processes inside whiteboxes 2019-12-30 14:33:05 -08:00
Eddie Hung
405e974fe5 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-12-30 14:31:42 -08:00
Eddie Hung
ece423415c Add CHANGELOG entry, add abc9_{flop,keep} attr to README.md 2019-12-30 14:24:58 -08:00
Eddie Hung
a038294a87 Tidy up abc9_map.v 2019-12-30 14:19:29 -08:00
Eddie Hung
d7ada66497 Add "synth_xilinx -dff" option, cleanup abc9 2019-12-30 14:13:16 -08:00
Eddie Hung
79448f9be0 Update doc that "-retime" calls abc with "-dff -D 1" 2019-12-30 13:28:29 -08:00
Eddie Hung
c9e3b26412 Disable synth_gowin -abc9 as it offers no advantages yet 2019-12-30 13:28:29 -08:00