yosys

16042 commits 122 branches 59 tags 71 MiB

Author	SHA1	Message	Date
Jannis Harder	331ac5285f	tests: Run async2sync before sat and/or sim to handle $check cells Right now neither `sat` nor `sim` have support for the `$check` cell. For formal verification it is a good idea to always run either async2sync or clk2fflogic which will (in a future commit) lower `$check` to `$assert`, etc. While `sim` should eventually support `$check` directly, using `async2sync` is ok for the current tests that use `sim`, so this commit also runs `async2sync` before running sim on designs containing assertions.	2024-02-01 16:14:11 +01:00
Krystine Sherwin	e5c32f399a	synth_quicklogic: Testing double_sync_ram_tdp	2023-12-04 15:52:03 +01:00
Krystine Sherwin	215a777eb3	qlf_tests: minor adjustment Renamed python script so that it sits next to the testbench file when alphabetically sorted. Reverted `MAX_WIDTH` to full precision for truncation testing.	2023-12-04 15:52:03 +01:00

Author

SHA1

Message

Date

Jannis Harder

331ac5285f

tests: Run async2sync before sat and/or sim to handle $check cells

Right now neither `sat` nor `sim` have support for the `$check` cell.
For formal verification it is a good idea to always run either
async2sync or clk2fflogic which will (in a future commit) lower `$check`
to `$assert`, etc.

While `sim` should eventually support `$check` directly, using
`async2sync` is ok for the current tests that use `sim`, so this commit
also runs `async2sync` before running sim on designs containing
assertions.

2024-02-01 16:14:11 +01:00

Krystine Sherwin

e5c32f399a

synth_quicklogic: Testing double_sync_ram_tdp

2023-12-04 15:52:03 +01:00

Krystine Sherwin

215a777eb3

qlf_tests: minor adjustment

Renamed python script so that it sits next to the testbench file when alphabetically sorted.
Reverted `MAX_WIDTH` to full precision for truncation testing.

2023-12-04 15:52:03 +01:00

Renamed from tests/arch/quicklogic/qlf_k6n10f/gen_memories.py (Browse further)

3 commits