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Author	SHA1	Message	Date
Clifford Wolf	49b8160488	Add warnings for quickly growing FSM table size in fsm_expand	2017-01-26 09:05:59 +01:00
Clifford Wolf	b0a430f601	Merge branch 'master' of github.com:cliffordwolf/yosys	2017-01-26 08:59:26 +01:00
Clifford Wolf	b54972c112	Fix RTLIL::Memory::start_offset initialization	2017-01-25 17:00:59 +01:00
Clifford Wolf	fea528280b	Add "enum" and "typedef" lexer support	2017-01-17 17:33:52 +01:00
Clifford Wolf	87fe8ab3f2	Merge pull request #293 from thoughtpolice/minor-cleanup ... Delete some dead code in the Hierarchy pass	2017-01-16 10:25:25 +01:00
Austin Seipp	6781543244	passes/hierarchy: delete some dead code ... Signed-off-by: Austin Seipp <aseipp@pobox.com>	2017-01-15 16:39:12 -06:00
Clifford Wolf	78f65f89ff	Fix bug in AstNode::mem2reg_as_needed_pass2()	2017-01-15 13:52:50 +01:00
Clifford Wolf	b7cfb7dbd2	Fix $initstate handling bug in yosys-smtbmc	2017-01-11 14:14:12 +01:00
Clifford Wolf	8953a55cd8	Update ABC to hg id f8cadfe3861f	2017-01-11 10:56:27 +01:00
Clifford Wolf	8012de40b9	Updated ABC to hg id 38b26a543f1d	2017-01-08 11:57:52 +01:00
Clifford Wolf	2d32c6c4f6	Fixed handling of local memories in functions	2017-01-05 13:19:03 +01:00
Clifford Wolf	0cac95ea94	Added "check -initdrv"	2017-01-04 18:12:41 +01:00
Clifford Wolf	81a9ee2360	Added handling of local memories and error for local decls in unnamed blocks	2017-01-04 16:03:04 +01:00
Clifford Wolf	b9ad91b93e	Implicitly set "yosys-smtbmc --noprogress" on windows	2017-01-04 15:23:48 +01:00
Clifford Wolf	080004b19a	Fixed typo in tests/simple/arraycells.v	2017-01-04 12:39:01 +01:00
Clifford Wolf	ed812ea39c	Fixed "yosys-smtbmc --noprogress"	2017-01-04 12:03:04 +01:00
Clifford Wolf	dfb461fe52	Added Verilog $rtoi and $itor support	2017-01-03 17:40:58 +01:00
Clifford Wolf	81bb952e5d	Handle "always 1" like "always -1" in .smtc files	2017-01-02 20:08:03 +01:00
Clifford Wolf	f0df7dd796	Added cell port resizing to hierarchy pass	2017-01-01 23:03:44 +01:00
Clifford Wolf	a7fb64efe6	Updated ABC to hg id 55cd83f432c0	2016-12-31 21:52:27 +01:00
Clifford Wolf	6b2c23c721	Bugfix in RTLIL::SigSpec::remove2()	2016-12-31 16:14:42 +01:00
Clifford Wolf	7da7a6d1df	Updated ABC to hg id 8c6a635f7a20	2016-12-29 12:20:35 +01:00
Clifford Wolf	2198948398	Improved write_json help message	2016-12-29 12:13:29 +01:00
Clifford Wolf	4f5efc3416	Updated ABC to hg id f591c081d5e7	2016-12-26 17:52:38 +01:00
Clifford Wolf	4cf3170194	Merge pull request #284 from azonenberg/master ... greenpak4: Support for many new cell types	2016-12-24 14:28:39 +01:00
Andrew Zonenberg	5ffede5c0e	Merge pull request #1 from azonenberg-hk/master ... Pull changes from HK trip	2016-12-23 12:32:55 -08:00
Andrew Zonenberg	9f69a70d74	Merge https://github.com/cliffordwolf/yosys	2016-12-23 05:10:37 -08:00
Clifford Wolf	33a22f8768	Simplified log_spacer() code	2016-12-23 02:06:46 +01:00
Clifford Wolf	a0dff87a57	Added "yosys -W regex"	2016-12-22 23:41:44 +01:00
Clifford Wolf	f144adec58	Added AIGER back-end to automatic back-end detection	2016-12-21 10:16:47 +01:00
Clifford Wolf	f31e6a7174	Updated ABC to hg rev a4872e22c646	2016-12-21 10:16:10 +01:00
Clifford Wolf	3d0e51f813	Updated ABC to hg rev 8bab2eedbba4	2016-12-21 09:13:20 +01:00
Andrew Zonenberg	ada98844b9	greenpak4: Added INT pin to GP_SPI	2016-12-21 11:35:29 +08:00
Andrew Zonenberg	6b526e9382	greenpak4: removed unused MISO pin from GP_SPI	2016-12-21 11:33:32 +08:00
Andrew Zonenberg	638f3e3b12	greenpak4: Removed SPI_BUFFER parameter	2016-12-20 13:07:49 +08:00
Andrew Zonenberg	073e8df9f1	greenpak4: replaced MOSI/MISO with single one-way SDAT pin	2016-12-20 12:34:56 +08:00
Andrew Zonenberg	d4a05b499e	greenpak4: Changed port names on GP_SPI for clarity	2016-12-20 10:30:38 +08:00
Andrew Zonenberg	eb80ec84aa	greenpak4: Initial implementation of GP_SPI cell	2016-12-20 09:58:02 +08:00
Andrew Zonenberg	fcd40fd41e	Merge https://github.com/cliffordwolf/yosys	2016-12-17 12:02:46 +08:00
Andrew Zonenberg	de1d81511a	greenpak4: Updated GP_DCMP cell model	2016-12-17 12:01:22 +08:00
Andrew Zonenberg	7cdba8432c	greenpak: Fixes to GP_DCMP* blocks. Added GP_CLKBUF.	2016-12-16 15:14:20 +08:00
Clifford Wolf	3886669ab6	Added "verilog_defines" command	2016-12-15 17:49:28 +01:00
Andrew Zonenberg	bea6e2f11f	greenpak4: Initial version of GP_DCMP skeleton (not yet usable). Changed interface to GP_DCMPMUX	2016-12-15 15:19:35 +08:00
Andrew Zonenberg	3690aa556c	greenpak4: More fixups of GP_DCMPx cells	2016-12-15 07:19:08 +08:00
Andrew Zonenberg	3491d33863	greenpak4: And another typo :(	2016-12-15 07:17:07 +08:00
Andrew Zonenberg	ea787e6be3	greenpak4: Fixed another typo	2016-12-15 07:16:26 +08:00
Andrew Zonenberg	58da621ac3	greenpak4: Fixed typo	2016-12-15 07:15:38 +08:00
Andrew Zonenberg	262f8f913c	greenpak4: Cleaned up trailing spaces in cells_sim	2016-12-14 14:14:45 +08:00
Andrew Zonenberg	c77e6e6114	greenpak4: Added GP_DCMPREF / GP_DCMPMUX	2016-12-14 14:14:26 +08:00
Clifford Wolf	00761de1b7	Bugfix in comment handling	2016-12-13 13:48:09 +01:00