Clifford Wolf
393b18e8e1
Merge branch 'azonenberg-recover-reduce'
2017-08-28 19:52:51 +02:00
Clifford Wolf
908f34aafc
Rename recover_reduce to extract_reduce, fix args handling
2017-08-28 19:52:06 +02:00
Clifford Wolf
3aad3ed3da
Merge branch 'recover-reduce' of https://github.com/azonenberg/yosys into azonenberg-recover-reduce
2017-08-28 19:46:17 +02:00
Clifford Wolf
ebbb0e9479
Further improve extract_fa pass
2017-08-28 19:43:26 +02:00
Clifford Wolf
a682800187
Merge pull request #392 from azonenberg/greenpak-portfixes
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Fixed bug causing GP_SPI model to not synthesize
2017-08-28 15:29:58 +02:00
Andrew Zonenberg
e62362225c
Fixed bug causing GP_SPI model to not synthesize
2017-08-27 07:31:48 -07:00
Robert Ou
849b885775
recover_reduce: Update documentation
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The documentation now describes the commands performed in the deleted
recover_reduce script.
2017-08-27 02:19:19 -07:00
Robert Ou
74d0f17fd4
recover_reduce: Reindent using tabs
2017-08-27 02:12:41 -07:00
Robert Ou
8a5887464c
recover_reduce: Rename recover_reduce_core to recover_reduce
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Clifford has commented on PR #387 stating that he does not like the
driver script and would prefer to only have the core script with
appropriate notes in the documentation.
Also rename to .cc (rather than .cpp) for consistency.
2017-08-27 02:01:32 -07:00
Robert Ou
99dad40ed0
recover_reduce: Add driver script for the $reduce_* recover feature
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Conflicts:
passes/techmap/Makefile.inc
2017-08-27 01:57:20 -07:00
Robert Ou
8b7dc792ee
recover_reduce_core: Finish implementing the core function
2017-08-27 01:56:49 -07:00
Robert Ou
fa310c98f8
recover_reduce_core: Initial commit
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Conflicts:
passes/techmap/Makefile.inc
2017-08-27 01:56:49 -07:00
Clifford Wolf
68c42f3a19
Don't track , ... contradictions through x/z-bits
2017-08-25 16:18:17 +02:00
Clifford Wolf
db6d78a186
Add removing of redundant pairs of bits in ==, ===, !=, and !== to opt_expr
2017-08-25 16:02:15 +02:00
Clifford Wolf
86df0fb381
Merge branch 'extract_fa'
2017-08-25 13:42:13 +02:00
Clifford Wolf
382cc90c65
Further improve extract_fa (seems to be fully functional now)
2017-08-25 13:41:54 +02:00
Clifford Wolf
0bf612506c
Rename "adders" to "extract_fa"
2017-08-25 12:04:40 +02:00
Clifford Wolf
c2d737457a
Fix bug in write_smt2 (export logic driving hierarchical cells before exporting regs)
2017-08-25 11:44:48 +02:00
Clifford Wolf
15cdda7c4b
Towards more generic "adder" function extractor
2017-08-23 14:20:10 +02:00
Clifford Wolf
51cbec7f75
Add experimental adders pass
2017-08-22 13:52:13 +02:00
Clifford Wolf
d3b3dd8e88
Add hashlib support for hashing of pools
2017-08-22 13:04:33 +02:00
Clifford Wolf
bce0bb6e43
Add consteval support for $_ANDNOT_ and $_ORNOT_
2017-08-22 13:04:05 +02:00
Clifford Wolf
df3e6e1ec9
Remove some dead code from fsm_map
2017-08-21 15:02:16 +02:00
Clifford Wolf
ca53fba44a
Rename "singleton" pass to "uniquify"
2017-08-20 12:31:50 +02:00
Clifford Wolf
d38a64b1cf
More intuitive handling of "cd .." for singleton modules
2017-08-19 00:15:12 +02:00
Clifford Wolf
bbdf7d9c66
Add "sim -zinit -rstlen"
2017-08-18 12:54:17 +02:00
Clifford Wolf
35760dd784
Merge branch 'sim'
2017-08-18 11:45:15 +02:00
Clifford Wolf
d30cc60ba9
Add "sim" support for memories
2017-08-18 11:44:50 +02:00
Clifford Wolf
4ba5bd12c6
Add Const methods is_fully_zero(), is_fully_def(), and is_fully_undef()
2017-08-18 11:40:08 +02:00
Clifford Wolf
0be738eaac
Add support for assert/assume/cover to "sim" command
2017-08-18 10:24:14 +02:00
Clifford Wolf
92e4b5aa77
Add writeback mode to "sim" command
2017-08-17 15:54:51 +02:00
Clifford Wolf
7b4f3f86c3
Improve "sim" command
2017-08-17 12:27:08 +02:00
Clifford Wolf
864498527a
Merge pull request #386 from azonenberg/gpak-counters
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Bug fixes to GP_COUNTx and GP_PGEN cells in GreenPAK technology library
2017-08-16 15:58:29 +02:00
Clifford Wolf
75046aa531
Add "sim" command skeleton
2017-08-16 13:05:21 +02:00
Andrew Zonenberg
e6eaf487b6
Fixed more issues with GreenPAK counter sim models
2017-08-15 09:18:36 -07:00
Andrew Zonenberg
3a404be62a
Updated PGEN model to have level triggered reset (matches actual hardware behavior
2017-08-15 09:18:27 -07:00
Andrew Zonenberg
e5109847c9
Fixed bug in GP_COUNTx model
2017-08-15 09:18:17 -07:00
Andrew Zonenberg
66b256d40e
Fixed bug where GP_COUNTx_ADV would wrap even when KEEP was high
2017-08-15 09:18:07 -07:00
Clifford Wolf
e9918365fd
Merge branch 'azonenberg-rmports'
2017-08-15 11:32:55 +02:00
Clifford Wolf
88983f5012
Mostly coding style related fixes in rmports pass
2017-08-15 11:32:35 +02:00
Clifford Wolf
9fe6bc48a9
Merge branch 'rmports' of https://github.com/azonenberg/yosys into azonenberg-rmports
2017-08-15 11:19:55 +02:00
Clifford Wolf
2cf0b5c157
Merge pull request #381 from azonenberg/countfix
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Added better behavioral models for GreenPAK counters. Refactored cells_sim into two files so analog/mixed signal stuff is separate
2017-08-14 21:47:26 +02:00
Clifford Wolf
6d371f06ab
Merge pull request #383 from azonenberg/abcfnames
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abc: Allow +/ filenames in the abc command
2017-08-14 21:46:17 +02:00
Clifford Wolf
76efbcc15f
Merge pull request #382 from azonenberg/jsoniofix
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json: Parse inout correctly rather than as an output
2017-08-14 21:45:54 +02:00
Clifford Wolf
237b482b92
Merge pull request #384 from azonenberg/crtechlib
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CoolRunner-II technology library improvements
2017-08-14 21:45:29 +02:00
Robert Ou
78fd24f40f
coolrunner2: Add INVERT parameter to some BUFGs
2017-08-14 12:13:33 -07:00
Robert Ou
1e3ffd57cb
coolrunner2: Add FFs with clock enable to cells_sim.v
2017-08-14 12:13:25 -07:00
Robert Ou
9a64ba3338
abc: Allow +/ filenames in the abc command
2017-08-14 12:11:11 -07:00
Robert Ou
366ce87cff
json: Parse inout correctly rather than as an output
2017-08-14 12:09:03 -07:00
Andrew Zonenberg
15e41d6363
rmports: Now remove ports from cell instances if we optimized them out of that cell
2017-08-14 11:44:05 -07:00
