Aki Van Ness
7a275567df
pass metadata: added the output of parameters,
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it's kinda dumb at the moment and needs parsing based on type but it's a start
2022-04-08 08:05:15 +02:00
Aki Van Ness
d8b85e1247
pass metadata: fixed some of the output formatting
2022-04-08 08:05:15 +02:00
Aki Van Ness
f6bb238051
pass metadata: initial commit of the metadata pass for exporting design metadata for yosys assisted tooling
2022-04-08 08:05:15 +02:00
Iris Johnson
ccc6060f52
Makefile: properly conditionalize features requiring compression.
2022-04-07 20:07:44 -05:00
github-actions[bot]
e0ba324236
Bump version
2022-04-08 00:15:41 +00:00
Catherine
8a1d531b25
Merge pull request #3269 from YosysHQ/micko/fix_autotop
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Reorder steps in -auto-top to fix synth command, fixes #3261
2022-04-07 22:40:35 +00:00
Marcelina Kościelnicka
376d8cb26f
abc: Add support for FFs with reset in -dff
2022-04-07 15:05:02 +02:00
github-actions[bot]
4da3f2878b
Bump version
2022-04-06 00:14:30 +00:00
Zachary Snow
bf15dbd0f7
sv: fix always_comb auto nosync for nested and function blocks
2022-04-05 14:43:48 -06:00
Miodrag Milanovic
977002b1d2
Reorder steps in -auto-top to fix synth command, fixes #3261
2022-04-05 14:02:37 +02:00
Miodrag Milanovic
957fdb328a
Next dev cycle
2022-04-05 11:50:49 +02:00
Miodrag Milanovic
b63e0a0cae
Release version 0.16
2022-04-05 11:49:37 +02:00
github-actions[bot]
580800eb0d
Bump version
2022-04-05 00:13:50 +00:00
Marcelina Kościelnicka
0aec79a0da
show: Fix width labels.
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See #3266 .
2022-04-04 22:48:09 +02:00
Miodrag Milanovic
0d3bf9e725
Update CHANGELOG and manual
2022-04-04 16:53:47 +02:00
Miodrag Milanović
75f4847689
Merge pull request #3265 from YosysHQ/micko/sim_improvements
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Improve sim by setting proper past D and AD signals
2022-04-04 09:56:56 +02:00
Miodrag Milanovic
6020ba67ac
past_ad initial value setting
2022-04-02 19:13:15 +02:00
Miodrag Milanovic
2c96ecc5f7
setInitState can be only one altering values
2022-04-02 19:13:15 +02:00
Miodrag Milanovic
b54aecd80a
Set past_d value for init state
2022-04-02 19:13:15 +02:00
Jannis Harder
8ca9737180
Merge pull request #3264 from jix/invalid_ff_dcinit_merge
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opt_merge: Add `-keepdc` option required for formal verification
2022-04-02 12:41:28 +02:00
github-actions[bot]
5ac5c57c73
Bump version
2022-04-02 00:13:41 +00:00
Jannis Harder
ca5b910296
opt_merge: Add -keepdc option required for formal verification
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The `-keepdc` option prevents merging flipflops with dont-care bits in
their initial value, as, in general, this is not a valid transform for
formal verification.
The keepdc option of `opt` is passed along to `opt_merge` now.
2022-04-01 21:03:20 +02:00
Miodrag Milanović
2a76af9eb6
Merge pull request #3263 from YosysHQ/micko/clk2ff_init
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Set init values for wrapped async control signals
2022-04-01 19:37:02 +02:00
Miodrag Milanovic
86ce441af6
Set init values for wrapped async control signals
2022-04-01 17:44:00 +02:00
Miodrag Milanović
2ec4af56e6
Merge pull request #3262 from YosysHQ/micko/verific_hiernet
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Preserve internal wires for external nets
2022-04-01 12:58:09 +02:00
Miodrag Milanovic
1a1f529099
Preserve internal wires for external nets
2022-04-01 12:07:15 +02:00
github-actions[bot]
2b115d858d
Bump version
2022-04-01 01:25:19 +00:00
Miodrag Milanović
ed83f0dea8
Merge pull request #3256 from YosysHQ/micko/aiw_multiclock
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Support memories in aiw and multiclock
2022-03-31 15:45:30 +02:00
Miodrag Milanovic
c95b9b4ba5
Support memories in aiw and multiclock
2022-03-31 13:10:13 +02:00
github-actions[bot]
fc2af4e32d
Bump version
2022-03-31 01:15:49 +00:00
Miodrag Milanović
18fb73fd89
Merge pull request #3259 from YosysHQ/micko/verific_valgrind
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Fix valgrind tests when using verific
2022-03-30 17:29:40 +02:00
Miodrag Milanovic
bbf65702a1
Fix valgrind tests when using verific
2022-03-30 17:25:53 +02:00
Miodrag Milanović
0921e5b9a4
Merge pull request #3260 from YosysHQ/micko/proper_scopename
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Proper scope naming from FST
2022-03-30 16:51:27 +02:00
Miodrag Milanovic
2e47b61cc6
Proper scope naming from FST
2022-03-30 15:55:15 +02:00
Miodrag Milanović
72e5498bdf
Merge pull request #3250 from YosysHQ/micko/verific_consistent
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Import Verific netlist in consistent order
2022-03-30 11:03:14 +02:00
github-actions[bot]
c662fcbc5c
Bump version
2022-03-30 01:17:20 +00:00
Miodrag Milanović
d44f618de5
Merge pull request #3258 from jix/fix-no-assertions
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smtbmc: fix bmc with no assertions
2022-03-29 21:20:07 +02:00
Jannis Harder
8b15f3a548
smtbmc: fix bmc with no assertions
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this was broken by the `--keep-going` changes
2022-03-29 20:41:50 +02:00
github-actions[bot]
48d7a6c477
Bump version
2022-03-29 00:16:12 +00:00
Marcelina Kościelnicka
3bebe17e5d
kernel/mem: Only use FF init in read-first emu for mem with init
2022-03-28 17:03:02 +02:00
Jannis Harder
8cc8c5efde
Merge pull request #3253 from jix/smtbmc-nodeepcopy
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smtbmc: Avoid unnecessary deep copies during unrolling
2022-03-28 16:59:26 +02:00
Jannis Harder
17e2a3048c
Merge pull request #3247 from jix/smtbmc-keepgoing
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smtbmc `--keep-going`
2022-03-28 16:58:41 +02:00
Lofty
c1057cb3e0
Merge pull request #3194 from Ravenslofty/abc9-flow3mfs
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abc9: add flow3mfs script
2022-03-28 15:51:04 +01:00
Lofty
421192f1cb
Merge pull request #3246 from YosysHQ/gatecat/timing-derive-fix
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abc9_ops: Also derive blackboxes with timing info
2022-03-28 15:50:53 +01:00
Tim Pambor
30bc0d26ea
gowin: Add oscillator primitives
2022-03-28 13:33:24 +02:00
Jannis Harder
d25daa6203
smtbmc: Avoid unnecessary deep copies during unrolling
2022-03-28 13:03:48 +02:00
Miodrag Milanović
62b89bb0d4
Update URL to zlib
2022-03-28 11:05:30 +02:00
Miodrag Milanovic
703769e494
Properly mark modules imported
2022-03-26 09:43:51 +01:00
github-actions[bot]
207417617d
Bump version
2022-03-26 00:13:30 +00:00
NotAFile
349c0ff0a7
Add some more reserve calls to RTLIL::Const
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This results in a slight ~0.22% total speedup synthesizing vexriscv
2022-03-25 18:38:00 +00:00
