320 commits

Author	SHA1	Message	Date
Clifford Wolf	244e8ce1f4	Added splice command	2014-02-07 20:30:56 +01:00
Clifford Wolf	08aa1062b4	Added log_header() to splitnets	2014-02-07 19:51:15 +01:00
Clifford Wolf	fc3b3c4ec3	Added $slice and $concat cell types	2014-02-07 17:44:57 +01:00
Clifford Wolf	99b1e9ee56	Re-enabled abc "retime" after sorting yout the yosys-bigsim problem	2014-02-07 16:36:37 +01:00
Clifford Wolf	366dcd3abf	Fixed use of "cmd_error" in passes/cmds/design.cc	2014-02-07 14:16:42 +01:00
Clifford Wolf	0192f1c66e	Disabled ABC retime for now (elliptic_curve_group testcase in yosys-bigsim failed)	2014-02-06 22:31:58 +01:00
Clifford Wolf	58cb8d65af	Added "retime" to standard ABC recipes	2014-02-06 22:16:20 +01:00
Clifford Wolf	91eab69912	Added copy command	2014-02-06 22:09:21 +01:00
Clifford Wolf	cf593222f2	Added design -stash/-copy-from/-copy-to	2014-02-06 21:52:07 +01:00
Clifford Wolf	37fdb2ca7a	Added support for s: select expressions (wire width)	2014-02-06 19:45:03 +01:00
Clifford Wolf	9428050dd6	Added i:, o:, and x: selection pattern	2014-02-06 19:35:33 +01:00
Clifford Wolf	d7d1c7baf8	Added support for %m selection op	2014-02-06 19:30:08 +01:00
Clifford Wolf	f2fdcef13d	Merge branch 'master' of github.com:cliffordwolf/yosys	2014-02-06 19:22:50 +01:00
Clifford Wolf	fa295a4528	Added generic RTLIL::SigSpec::parse_sel() with support for selection variables	2014-02-06 19:22:46 +01:00
Johann Glaser	34eb77d2bf	new %s: add sub-modules to selection	2014-02-06 17:36:39 +01:00
Clifford Wolf	d4b0f28881	Added support for sat -show @<sel_name>	2014-02-06 17:32:51 +01:00
Clifford Wolf	b1a12c5f37	Added sat -set-init-def and sat -tempinduct-def	2014-02-06 16:15:23 +01:00
Clifford Wolf	594d52e0b6	Added opt_const -undriven	2014-02-06 15:49:03 +01:00
Clifford Wolf	c526e56747	Added expose -dff	2014-02-06 15:48:42 +01:00
Clifford Wolf	c13c5b9b7b	Changed techmap description from "simple" to "generic"	2014-02-06 13:10:06 +01:00
Clifford Wolf	eb8fd4a163	Added miter -make_outcmp	2014-02-06 02:20:55 +01:00
Clifford Wolf	80a1cdb0e2	Added sat -set-init-zero support	2014-02-06 01:40:01 +01:00
Clifford Wolf	e915043144	Added sat -verify and -falsify support for non-prove cases	2014-02-06 00:59:41 +01:00
Clifford Wolf	cd06055e77	Added expose command	2014-02-05 23:59:55 +01:00
Clifford Wolf	dbfcc2f4e2	Simplified select "Assertation failed" message generation	2014-02-05 18:52:55 +01:00
Clifford Wolf	94b802c65d	Merge branch 'master' of github.com:cliffordwolf/yosys	2014-02-05 18:46:47 +01:00
Clifford Wolf	f6e6e9b844	Added selection support for r: and selection with relational operators	2014-02-05 18:24:45 +01:00
Johann Glaser	3c0b5139a1	be more verbose for select -assert-any and -assert-none	2014-02-05 16:03:02 +01:00
Johann Glaser	667543de0b	improved help for "select"	2014-02-05 15:53:02 +01:00
Clifford Wolf	5bf33de24a	Added setattr and setparam commands	2014-02-05 11:11:55 +01:00
Clifford Wolf	1fb8ba73bd	Throw errors if non-existing selection variables are used	2014-02-04 23:31:06 +01:00
Clifford Wolf	b1bf55dd63	Added select -none	2014-02-04 23:23:44 +01:00
Clifford Wolf	99b9c56da1	Fixed detection of init attribute in opt_rmdff	2014-02-04 23:00:32 +01:00
Clifford Wolf	69e867f3e8	Added support for inline commands to abc -script	2014-02-04 22:01:53 +01:00
Clifford Wolf	7a5f378bae	Added hierarchy -purge_lib option	2014-02-04 16:50:13 +01:00
Clifford Wolf	6891fd79a3	added sat -falsify	2014-02-04 13:34:37 +01:00
Clifford Wolf	d267bcde4e	Fixed bug in sequential sat proofs and improved handling of asserts	2014-02-04 12:46:16 +01:00
Clifford Wolf	ecdf1f5577	Improved handling of reg init in opt_share and opt_rmdff	2014-02-04 12:02:47 +01:00
Clifford Wolf	9e35021585	Addred sat option -ignore_unknown_cells	2014-02-03 16:26:10 +01:00
Clifford Wolf	a6750b3753	Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)	2014-02-03 13:01:45 +01:00
Clifford Wolf	de336d93b2	More opt_const -mux_bool features	2014-02-02 22:41:24 +01:00
Clifford Wolf	9d0b69edaa	Added opt_const -mux_bool	2014-02-02 22:11:08 +01:00
Clifford Wolf	bee4450c4c	Added support for inverter chains to opt_const	2014-02-02 21:46:42 +01:00
Clifford Wolf	67b0ce2578	Only generate write-enable $and if WE is not constant 1 in memory_map	2014-02-02 21:27:26 +01:00
Clifford Wolf	83fa652820	Added constant-clock case to opt_rmdff	2014-02-02 21:09:08 +01:00
Clifford Wolf	aa732b0c73	Added show -notitle option	2014-02-02 17:55:32 +01:00
Clifford Wolf	9808acdc75	Added delete command	2014-02-02 17:11:19 +01:00
Clifford Wolf	a9e2d86f86	Added suuport for module attribute matching with A:<pattern>[=<pattern>] syntax	2014-02-02 16:47:17 +01:00
Clifford Wolf	f4f0bd6eef	Fixed a bug in miter command	2014-02-01 22:53:27 +01:00
Clifford Wolf	374674aff4	Added sat -show-inputs and -show-outputs	2014-02-01 22:52:44 +01:00