Emil J. Tywoniak
0cd55e1d7c
Makefile: fix
2024-07-12 11:00:36 +02:00
Emil J. Tywoniak
7d9ba37fa0
abc: bump for reproducilbe .gitcommit
2024-07-12 10:52:13 +02:00
Emil J. Tywoniak
9d15f1d6ac
Makefile: reproducible .gitcommit
2024-07-12 10:52:03 +02:00
YRabbit
19bbdd8800
Gowin. Add the DCS primitive
...
Not so much adding the primitive itself, but only its DCS_MODE
parameter, without which an error occurs.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-11 21:39:44 +10:00
github-actions[bot]
b08688f711
Bump version
2024-07-10 00:18:13 +00:00
Miodrag Milanović
65834440ad
Merge pull request #4482 from YosysHQ/micko/vs_build
...
Use alternate location for VS build required files
2024-07-09 15:48:46 +02:00
Miodrag Milanovic
130dee6e56
Use alternate location for VS build required files
2024-07-09 14:19:33 +02:00
Emil J. Tywoniak
725746baa6
Makefile: LTO for all, lld for clang
2024-07-09 11:25:16 +02:00
Miodrag Milanovic
b9181aaad2
Next dev cycle
2024-07-09 09:27:23 +02:00
Miodrag Milanovic
ead4718e56
Enable extensions for CI
2024-07-09 09:22:37 +02:00
Miodrag Milanovic
c6e5e0b26b
Release version 0.43
2024-07-09 09:11:59 +02:00
chunlin min
3db69b7a10
inline all tests. Add switch to remove init values as PolarFire DFFs do not support init
2024-07-08 17:03:03 -04:00
chunlin min
0afb5e28fb
cosmetic changes
2024-07-08 15:10:44 -04:00
Emil J. Tywoniak
ad22430b96
Makefile: use -O3 instead of -Os
2024-07-08 19:19:10 +02:00
Emil J. Tywoniak
fee274c76a
Makefile: let clang use -Og in debug builds
2024-07-08 18:16:04 +02:00
chunlin min
af67c745c4
initialize argidx to 1
2024-07-08 11:41:41 -04:00
chunlin min
a0c9d10118
undo last change, to investigate dff_opt test failure
2024-07-08 11:30:52 -04:00
chunlin min
3c95a28dc2
fix compile warning
2024-07-08 11:13:53 -04:00
Tony Min
d41688f7d7
Revisions ( #4 )
...
* area should be 1 for all LUTs
* clean up macros
* add log_assert to fail noisily when encountering oddly configured DFF
* clean help msg
* flatten set to true by default
* update
* merge mult tests
* remove redundant test
* move all dsp tests to single file and remove redundant tests
* update ram tests
* add more dff tests
* fix c++20 compile errors
* add option to dump verilog
* default to use abc9
* remove -abc9 option since its the default now
---------
Co-authored-by: tony <minchunlin@gmail.com>
2024-07-08 10:57:16 -04:00
YRabbit
9d0bca9775
Gowin. Add an energy saving primitive
...
We add a BANDGAP primitive used to turn off power to OSC, PLL and other
things on some GOWIN chips.
We also mark this primitive and GSR as keep.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-06 18:58:21 +10:00
N. Engelhardt
dac5bd1983
Merge pull request #4455 from phsauter/shiftadd-limit-padding
...
peepopt: limit padding from shiftadd
2024-07-06 08:10:25 +02:00
Tony Min
6fe0e00050
Add missing u sram init ( #3 )
...
add missing INIT for uSRAM
2024-07-04 16:39:10 -04:00
Tony Min
e9ff5f7d91
Merge pull request #2 from tony-min-1/move_tests
...
Move tests
2024-07-04 16:05:04 -04:00
chunlin min
9de5602574
ininclude microchip tests in makefile
2024-07-04 15:54:59 -04:00
chunlin min
8e7ec2d660
add assertions for synth_microchip tests
2024-07-04 15:45:44 -04:00
chunlin min
e3c4791e5b
move microchip tests from techlibs/microchip/tests to tests/arch/microchip
2024-07-04 14:16:52 -04:00
chunlin min
19d3214861
use output reg instead of additional reg declaration
2024-07-04 14:13:26 -04:00
Tony Min
7ff8912338
Merge pull request #1 from tony-min-1/change_filenames
...
changes made to filenames + references
2024-07-04 14:04:36 -04:00
C77874
5ba06fd947
another typo
2024-07-04 10:33:59 -07:00
C77874
6b80e02d62
missed a few pf instances
2024-07-04 10:25:15 -07:00
C77874
c385421c17
rename options
2024-07-04 09:45:04 -07:00
C77874
d0cd01adfe
fixed typos, build with makefile succeeds
2024-07-04 09:33:58 -07:00
C77874
59e45be275
Merge branch 'mchp' of https://github.com/tony-min-1/yosys into change_filenames
2024-07-04 09:00:38 -07:00
C77874
0bb7d1373f
changes made to filenames + references
2024-07-04 08:53:41 -07:00
Chun Lin Min
7770fa70e1
fix cells_sim.v
2024-07-04 05:20:22 -07:00
George Rennie
40b387a70b
smtbmc: Support skipping steps in cover mode
2024-07-03 22:12:06 +01:00
Chun Lin Min
e5bdc9b5c9
remove DSP48 references
2024-07-03 07:20:29 -07:00
Chun Lin Min
f57b624281
fix indent
2024-07-02 13:54:36 -07:00
Chun Lin Min
68a11c9941
more indent fix
2024-07-02 13:51:48 -07:00
Chun Lin Min
2ced2752e9
replace space indent with tab indent
2024-07-02 13:47:18 -07:00
Chun Lin Min
acddc36389
add PolarFire FPGA support
2024-07-02 12:44:30 -07:00
George Rennie
339d4e8932
hashlib: Correct prime sequence
2024-07-02 08:10:18 +01:00
George Rennie
78ae4ed9ac
hashlib: Add some more primes
...
* Add some primes as suggested in #4458 . This allows larger hashtables
to be allocated for very big designs
2024-07-01 12:37:41 +01:00
github-actions[bot]
a739e21a5f
Bump version
2024-06-29 00:16:56 +00:00
Catherine
580aaa362d
opt_lut_ins: fix name of global object. NFCI
2024-06-28 15:12:36 +00:00
Martin Povišer
07daf61ae6
Merge pull request #4467 from povik/fix-add-shiftx
...
rtlil: Fix `addShiftx` for signed shifts
2024-06-26 18:17:28 +02:00
Emil J. Tywoniak
01f332e750
opt_expr: reduce mostly harmless warning to log
2024-06-25 20:18:49 +02:00
github-actions[bot]
1288166f7a
Bump version
2024-06-25 00:17:11 +00:00
Miodrag Milanović
1e401c3e04
Merge pull request #4460 from YosysHQ/micko/c++17
...
Make C++17 compiler required
2024-06-24 19:54:30 +02:00
Martin Povišer
fa4a2b6b0d
opt_expr: In clkinv loop ignore irrelevant cells early
...
Each call to `handle_clkpol_celltype_swap` has a conversion of the
cell's type ID to an allocated string. This can sum up to a
non-negligible time being spent in the clkpol code even for a design
which doesn't have any flip-flop gates.
2024-06-24 18:32:33 +02:00
