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3 commits

Author SHA1 Message Date
Krystine Sherwin
18d1ba7f1f
analogdevices: Extra tests 
`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.
 2025-10-18 17:38:01 +13:00
Krystine Sherwin
b679cecd19 analogdevices: Update lutram.ys test 2025-10-14 14:13:15 +01:00
Lofty
40dbea0235 test suite 2025-10-14 14:13:15 +01:00