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10275 commits 101 branches 53 tags 48 MiB
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4 commits

Author SHA1 Message Date
Dan Ravensloft
1a07b330f8 intel_alm: Add multiply signedness to cells 
Quartus assumes unsigned multiplication by default, breaking signed
multiplies, so add an input signedness parameter to the MISTRAL_MUL*
cells to propagate to Quartus' <family>_mac cells.
 2020-08-26 22:50:16 +02:00
Dan Ravensloft
3b534a203a intel_alm: fix typo in MISTRAL_MUL27X27 cell name 2020-08-13 17:08:50 +02:00
Dan Ravensloft
4d9d90079c intel_alm: add additional ABC9 timings 2020-07-23 11:57:07 +01:00
Dan Ravensloft
b004f09018 intel_alm: DSP inference 2020-07-05 05:39:20 +02:00