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1407 commits

Author SHA1 Message Date
Eddie Hung
6b96df41bc abc9 to only disconnect output ports of AND and NOT gates 2019-02-21 11:15:47 -08:00
Eddie Hung
be061810d7 Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaig 2019-02-21 09:31:17 -08:00
Clifford Wolf
2da4c9c8f0 Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_???_, fixes #816 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-21 13:49:45 +01:00
Eddie Hung
7f26043caf ABC -> ABC9 2019-02-20 17:36:57 -08:00
Eddie Hung
e5b8bb9faa abc9 to disconnect mapped_mods POs correctly, and do not count $_NOT_ 2019-02-20 17:33:35 -08:00
Eddie Hung
32853b1f8d lut/not/and suffix to be ${lut,not,and} 2019-02-20 16:30:30 -08:00
Eddie Hung
2ca83005fb abc9 to cope with multiple modules 2019-02-20 12:56:15 -08:00
Eddie Hung
d6b317b349 abc9 to use & syntax for -fast, and name fixes 2019-02-20 12:40:17 -08:00
Eddie Hung
62e5ff9ba8 abc9 to cope with indexed wires when creating $lut from $_NOT_ 2019-02-19 16:06:03 -08:00
Eddie Hung
8158bc3f99 abc9 to replace $_NOT_ with $lut 2019-02-19 12:30:20 -08:00
Eddie Hung
45d49d5d14 Get rid of debugging stuff in abc9 2019-02-16 22:25:22 -08:00
Eddie Hung
f853b2f3c1 abc9 to write_aiger with -O option, and ignore dummy outputs 2019-02-16 20:09:40 -08:00
Eddie Hung
d8c4d4e6c7 abc9 to handle comb loops, cope with constant outputs, disconnect using new wire 2019-02-16 13:47:38 -08:00
Eddie Hung
e7c7ab8fc0 expose command to not skip 'internal' wires beginning with '$' 2019-02-16 13:45:17 -08:00
Eddie Hung
d4545d415b abc9 to cope with non-wideports, count cells properly 2019-02-16 08:53:06 -08:00
Eddie Hung
f8d0134598 Move lookup inside if 2019-02-15 15:23:26 -08:00
Eddie Hung
a786ac4d53 Refactor 2019-02-15 13:00:13 -08:00
Eddie Hung
914546efd9 Cope with width != 1 when re-mapping cells 2019-02-15 12:55:52 -08:00
Eddie Hung
956ee545c5 abc9 to stitch results with CI/CO properly 2019-02-15 11:52:34 -08:00
Eddie Hung
206f11dca3 Fix stitching 2019-02-13 17:04:23 -08:00
Eddie Hung
f0f5d8a5cc Merge remote-tracking branch 'origin/read_aiger' into xaig 2019-02-13 14:09:36 -08:00
Eddie Hung
06cf0555ee Merge https://github.com/YosysHQ/yosys into xaig 2019-02-13 14:08:31 -08:00
Eddie Hung
87f059adf7 Rip out some more stuff 2019-02-13 10:44:52 -08:00
Eddie Hung
045f7763ae Rip out unused functions in abc9 2019-02-12 16:25:22 -08:00
Eddie Hung
b3341b4abb WIP for ABC with aiger 2019-02-12 09:31:22 -08:00
Eddie Hung
c23e3f0751 Missing headers for Xcode? 2019-02-12 09:24:13 -08:00
Eddie Hung
5a0a5aae4f Compile abc9 2019-02-08 13:58:47 -08:00
Eddie Hung
e25a22015f Copy abc.cc to abc9.cc 2019-02-08 13:23:54 -08:00
David Shah
a4515712cb fsm_opt: Fix runtime error for FSMs without a reset state 
Signed-off-by: David Shah <dave@ds0.me>
 2019-02-07 10:35:36 +00:00
whitequark
58d059ccb7 proc_clean: fix critical typo. 2019-01-23 22:08:38 +00:00
whitequark
95b6c35882 proc_clean: fix fully def check to consider compare/signal length. 
Fixes #790.
 2019-01-18 23:22:19 +00:00
whitequark
e792bd56b7 flowmap: clean up terminology. 
* "map": group gates into LUTs;
  * "pack": replace gates with LUTs.

This is important because we have FlowMap and DF-Map, and currently
our messages are ambiguous.

Also clean up some other log messages while we're at it.
 2019-01-08 02:05:06 +00:00
whitequark
211c26a4c9 flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00
Clifford Wolf
8a63fc51d3 Bugfix in $memrd sharing 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-01-07 10:04:47 +01:00
Clifford Wolf
dbd51d7bda
Merge pull request #782 from whitequark/flowmap_dfs 
flowmap: construct a max-volume max-flow min-cut, not just any one
 2019-01-07 09:47:57 +01:00
Clifford Wolf
b5f6e786ea Switch "bugpoint" from system() to run_command() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-01-07 09:45:21 +01:00
whitequark
a342d6db49 bugpoint: new pass. 
A typical use of `bugpoint` would involve a script with a pass under
test, e.g.:

    flowmap -relax -optarea 100

and would be invoked as:

    bugpoint -yosys ./yosys -script flowmap.ys -clean -cells

This replaces the current design with the minimal design that still
crashes the `flowmap.ys` script.

`bugpoint` can also be used to perform generic design minimization
using `select`, e.g. the following script:

    select i:* %x t:$_MUX_ %i -assert-max 0

would remove all parts of the design except for an unbroken path from
an input to an output port that goes through exactly one $_MUX_ cell.
(The condition is inverted.)
 2019-01-07 03:13:19 +00:00
whitequark
8b44198e23 flowmap: construct a max-volume max-flow min-cut, not just any one. 2019-01-06 19:51:37 +00:00
Scott Mansell
62c90c4e17 Rename cells based on the wires they drive. 2019-01-06 19:00:16 +13:00
whitequark
2fcc1ee72e flowmap: add -minlut option, to allow postprocessing with opt_lut. 2019-01-04 21:18:03 +00:00
whitequark
9bc5cf0844 flowmap: cleanup for clarity. NFCI. 2019-01-04 13:04:20 +00:00
whitequark
fd21564deb flowmap: improve debug graph output. NFC. 2019-01-04 03:30:04 +00:00
whitequark
7850a0c28a flowmap: add link to longer version of paper. NFC. 2019-01-04 02:33:10 +00:00
Clifford Wolf
d98fe8ce1f
Merge pull request #775 from whitequark/opt_flowmap 
flowmap: new techmap pass
 2019-01-03 17:03:18 +01:00
whitequark
07af772a72 flowmap: new techmap pass. 2019-01-03 14:28:19 +00:00
Clifford Wolf
0fc6e2bfcf
Merge pull request #770 from whitequark/opt_expr_cmp 
opt_expr: refactor and improve simplification of comparisons
 2019-01-02 17:34:04 +01:00
whitequark
bf8db55ef3 opt_expr: improve simplification of comparisons with large constants. 
The idea behind this simplification is that a N-bit signal X being
compared with an M-bit constant where M>N and the constant has Nth
or higher bit set, it either always succeeds or always fails.

However, the existing implementation only worked with one-hot signals
for some reason. It also printed incorrect messages.

This commit adjusts the simplification to have as much power as
possible, and fixes other bugs.
 2019-01-02 15:45:28 +00:00
Clifford Wolf
979de95cf6
Merge pull request #750 from Icenowy/anlogic-ff-init 
Initialization of Anlogic DFFs
 2019-01-02 15:52:22 +01:00
Clifford Wolf
2e606b1802
Merge pull request #773 from whitequark/opt_lut_elim_fixes 
opt_lut: elimination fixes
 2019-01-02 15:45:29 +01:00
whitequark
efa278e232 Fix typographical and grammatical errors and inconsistencies. 
The initial list of hits was generated with the codespell command
below, and each hit was evaluated and fixed manually while taking
context into consideration.

    DIRS="kernel/ frontends/ backends/ passes/ techlibs/"
    DIRS="${DIRS} libs/ezsat/ libs/subcircuit"
    codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint

More hits were found by looking through comments and strings manually.
 2019-01-02 13:12:17 +00:00