Clifford Wolf
0d2b87e3ed
Merge pull request #1137 from mmicko/cell_sim_fix
...
Simulation model verilog fix
2019-06-26 19:06:10 +02:00
Miodrag Milanovic
ea0b6258ab
Simulation model verilog fix
2019-06-26 18:34:34 +02:00
Clifford Wolf
0b7d648c6a
Improve opt_clean handling of unused public wires
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-26 17:54:17 +02:00
Clifford Wolf
1b49380f6b
Improve BTOR2 handling of undriven wires
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-26 17:42:00 +02:00
Clifford Wolf
f6053b8810
Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-26 11:09:43 +02:00
Clifford Wolf
8e9ef891fe
Do not clean up buffer cells with "keep" attribute, closes #1128
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-26 11:01:03 +02:00
Clifford Wolf
b3c36b4448
Escape scope names starting with dollar sign in smtio.py
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-26 10:58:39 +02:00
whitequark
3d4102cfa4
Add more ECP5 Diamond flip-flops.
...
This includes all I/O registers, and a few more regular FFs where it
was convenient.
2019-06-26 01:57:29 +00:00
Eddie Hung
ab6e8ce0f0
Add testcase from #335 , fixed by #1130
2019-06-25 08:43:58 -07:00
Clifford Wolf
add2d415fc
Merge pull request #1130 from YosysHQ/eddie/fix710
...
memory_dff: walk through more than one mux for computing read enable
2019-06-25 17:34:44 +02:00
Eddie Hung
42720ef6fe
Fix spacing
2019-06-25 08:33:17 -07:00
Eddie Hung
c4e4902098
Move only one consumer check outside of while loop
2019-06-25 08:29:55 -07:00
Eddie Hung
58629dc2ce
Merge pull request #1129 from YosysHQ/eddie/ram32x1d
...
Add RAM32X1D support
2019-06-25 08:22:57 -07:00
Clifford Wolf
e754bce047
Merge pull request #1075 from YosysHQ/eddie/muxpack
...
Add new "muxpack" command for packing chains of $mux cells
2019-06-25 17:21:59 +02:00
Eddie Hung
b7deaceadd
Walk through as many muxes as exist for rd_en
2019-06-24 18:33:06 -07:00
Eddie Hung
a701a2accf
Add test
2019-06-24 18:32:58 -07:00
Eddie Hung
efd04880db
Add RAM32X1D support
2019-06-24 16:16:50 -07:00
Clifford Wolf
e32cef4063
Merge pull request #1124 from mmicko/json_ports
...
Add upto and offset to JSON ports
2019-06-24 08:52:12 +02:00
Eddie Hung
4ddc0354c1
Merge remote-tracking branch 'origin/master' into eddie/muxpack
2019-06-22 14:40:55 -07:00
Eddie Hung
fb8fab4a29
Add 'muxcover -dmux=<cost>' and '-nopartial' to CHANGELOG
2019-06-21 20:30:24 -07:00
Eddie Hung
e01bab6c64
Merge pull request #1108 from YosysHQ/clifford/fix1091
...
Add support for partial matches to muxcover
2019-06-21 17:13:41 -07:00
Eddie Hung
545cfbbe0d
Cope with $reduce_or common in case
2019-06-21 12:31:14 -07:00
Eddie Hung
32f637ffdb
Add more tests
2019-06-21 12:31:04 -07:00
Eddie Hung
ae8305ffcc
Fix testcase
2019-06-21 12:13:00 -07:00
Eddie Hung
15535112b7
Fix spacing
2019-06-21 11:52:51 -07:00
Eddie Hung
d89d663c92
Add doc
2019-06-21 11:52:28 -07:00
Eddie Hung
6ec8160981
Add more muxpack tests, with overlapping entries
2019-06-21 11:45:53 -07:00
Eddie Hung
641b86d25f
Fix up ExclusiveDatabase with @cliffordwolf's help
2019-06-21 11:45:31 -07:00
Eddie Hung
63eb5cace9
Merge branch 'master' into eddie/muxpack
2019-06-21 11:17:19 -07:00
Miodrag Milanovic
fde90f7f8e
Fix json formatting
2019-06-21 20:01:40 +02:00
Miodrag Milanovic
50e7221077
Add upto and offset to JSON ports
2019-06-21 19:47:25 +02:00
Clifford Wolf
e664814971
Merge pull request #1123 from mmicko/fix_typo
...
Fix json frontend loading upto
2019-06-21 19:25:35 +02:00
Clifford Wolf
ec979475e7
Replace "muxcover -freedecode" with "muxcover -dmux=cost"
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-21 19:24:41 +02:00
Miodrag Milanovic
3775763f51
Fix typo
2019-06-21 19:09:34 +02:00
Eddie Hung
6d74cf0d2b
Merge pull request #1085 from YosysHQ/eddie/shregmap_improve
...
Improve shregmap to handle case where first flop is common to two chains
2019-06-21 08:56:56 -07:00
Clifford Wolf
918460ddd3
Merge pull request #1122 from YosysHQ/clifford/jsonports
...
Added JSON upto and offset
2019-06-21 16:58:12 +02:00
Clifford Wolf
f15def325c
Added JSON upto and offset
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-21 15:22:17 +02:00
Clifford Wolf
f0955452ae
Merge pull request #1121 from YosysHQ/ecp5-ccu2c-inv
...
ecp5: Improve mapping of $alu when BI is used
2019-06-21 15:07:39 +02:00
David Shah
a0d3d2bb41
ecp5: Improve mapping of $alu when BI is used
...
Signed-off-by: David Shah <dave@ds0.me>
2019-06-21 09:45:11 +01:00
Clifford Wolf
c9949dba99
Merge pull request #1117 from bwidawsk/more-home
...
Add a few more filename rewrites
2019-06-21 10:13:51 +02:00
Clifford Wolf
78e7a6f6f2
Merge pull request #1119 from YosysHQ/eddie/fix1118
...
Make genvar a signed type
2019-06-21 10:13:13 +02:00
Clifford Wolf
86a753cc18
Merge pull request #1116 from YosysHQ/eddie/fix1115
...
Sign extend unsized 'bx and 'bz values
2019-06-21 10:12:32 +02:00
Clifford Wolf
9286b6f013
Add "muxcover -freedecode"
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-21 10:02:10 +02:00
Eddie Hung
c4ea6fff65
Fix gcc invalidation behaviour for write_aiger
2019-06-20 21:56:47 -07:00
Clifford Wolf
891ea6512e
Improvements in muxcover
...
- Slightly under-estimate cost of decoder muxes
- Prefer larger muxes at tree root at same cost
- Don't double-count input cost for partial muxes
- Add debug log output
2019-06-20 19:47:59 -07:00
Eddie Hung
844c42cef8
Missing a clean and opt_expr -mux_bool in test
2019-06-20 19:47:59 -07:00
Eddie Hung
75375a3fbc
Add test
2019-06-20 19:47:59 -07:00
Clifford Wolf
40188457d1
Add support for partial matches to muxcover, fixes #1091
...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-06-20 19:47:59 -07:00
Eddie Hung
e63324f5ef
Actually, there might not be any harm in updating sigmap...
2019-06-20 17:03:05 -07:00
Eddie Hung
9c61fb0e0c
Add comment as per @cliffordwolf
2019-06-20 16:57:54 -07:00
