411 commits

Author	SHA1	Message	Date
Clifford Wolf	2278995bd8	Started to implement real resource sharing	2014-07-19 20:54:32 +02:00
Clifford Wolf	efd9604dfb	Improved memory_share log messages	2014-07-19 15:46:11 +02:00
Clifford Wolf	e0a819dbe5	More verbose memory_share help message	2014-07-19 15:34:14 +02:00
Clifford Wolf	297a0962ea	Added SAT-based write-port sharing to memory_share	2014-07-19 15:33:55 +02:00
Clifford Wolf	26f982ac0b	Fixed bug in memory_share feedback-to-en code	2014-07-19 15:32:14 +02:00
Clifford Wolf	e441f07d89	Added translation from read-feedback to en-signals in memory_share	2014-07-18 16:46:40 +02:00
Clifford Wolf	44f13aff92	Improved seeding of color rng in show command	2014-07-18 16:44:45 +02:00
Clifford Wolf	a341931972	Only create collision detect logic in memory_share if necessary	2014-07-18 14:32:40 +02:00
Clifford Wolf	ab4b26679f	Added memory_share	2014-07-18 13:16:56 +02:00
Clifford Wolf	309ae98246	Apply opt_reduce WR_EN opts to the whole mux tree driving the WR_EN port	2014-07-18 10:28:45 +02:00
Clifford Wolf	1b00861d0a	Improved opt_reduce handling of mem wr_en mux bits	2014-07-17 12:12:04 +02:00
Clifford Wolf	b76bf05cda	Added support for "blackbox" attribute to iopadmap	2014-07-17 08:59:07 +02:00
Clifford Wolf	64a6906cc4	Added support for "blackbox" attribute to flatten/techmap	2014-07-17 08:58:51 +02:00
Clifford Wolf	d678b6533d	improved opt_reduce for $mem/$memwr WR_EN multiplexers	2014-07-16 14:08:51 +02:00
Clifford Wolf	765f172211	Changes to "memory" pass for new $memwr/$mem WR_EN interface	2014-07-16 12:49:50 +02:00
Clifford Wolf	3b52121d32	now ignore init attributes on non-register wires in sat command	2014-07-05 11:18:38 +02:00
Clifford Wolf	1c85584fe5	Do not create $dffsr cells with no-op resets in proc_dff	2014-06-19 12:29:29 +02:00
Clifford Wolf	22a998903b	Added %D and %c select commands	2014-06-14 16:19:32 +02:00
Clifford Wolf	744e518467	fixed cell array handling of positional arguments	2014-06-07 12:17:11 +02:00
Clifford Wolf	e275e8eef9	Add support for cell arrays	2014-06-07 11:48:50 +02:00
Clifford Wolf	7020f7fc13	added tee cmd	2014-06-03 09:23:31 +02:00
Clifford Wolf	68c99bf734	Fixed log messages in memory_dff	2014-06-01 11:32:27 +02:00
Johann Glaser	278085fa01	added log_header to miter and expose pass, show cell type for exposed ports	2014-05-28 18:05:38 +02:00
Johann Glaser	684c85902d	be more verbose when techmap yielded processes	2014-05-26 17:13:41 +02:00
Clifford Wolf	68c059565a	Fixed bug in opt_reduce (see vloghammer issue_044)	2014-05-12 12:45:47 +02:00
Clifford Wolf	f69b5800c9	fixed syntax error in dot file created by "show" command	2014-05-10 16:22:56 +02:00
Clifford Wolf	9a34486bfb	Fixed performance problem in opt_mux with nets driven by many conflicting drivers	2014-03-19 10:05:01 +01:00
Clifford Wolf	34e54cda5b	Small improvement in SAT log messages	2014-03-13 13:12:49 +01:00
Clifford Wolf	fad8558eb5	Merged OSX fixes from Siesh1oo with some modifications	2014-03-13 12:48:10 +01:00
Siesh1oo	8127d5e8c3	- kernel/register.h, kernel/driver.cc: refactor rewrite_yosys_exe()/get_share_file_name() to portable proc_self_dirname()/proc_share_dirname(). ... This refactoring improves robustness and allows OSX support with only 7 new lines of code, and easy extension for other systems. - passes/abc/abc.cc, passes/cmds/show.cc, passes/techmap/techmap.cc: use new, refactored semantics.	2014-03-12 23:17:14 +01:00
Clifford Wolf	9087ece97c	OSX compatible creation of stdcells.inc, using code from github.com/Siesh1oo/yosys ... (see https://github.com/cliffordwolf/yosys/pull/28)	2014-03-11 14:52:37 +01:00
Clifford Wolf	91704a7853	Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys ... (see https://github.com/cliffordwolf/yosys/pull/28)	2014-03-11 14:24:24 +01:00
Clifford Wolf	fa75c8286e	Fixed memory corruption in passes/abc/blifparse.cc	2014-03-11 13:09:01 +01:00
Clifford Wolf	fcae92868d	Fixed dumping of timing() { .. } block in libparse	2014-03-09 15:16:07 +01:00
Clifford Wolf	22aabe05c9	Verbose reading of liberty and constr files in ABC pass	2014-03-09 15:15:38 +01:00
Clifford Wolf	e3b11ea2d6	Fixed bug in freduce command	2014-03-07 18:44:23 +01:00
Clifford Wolf	6f8865d81a	Some minor code cleanups in freduce command	2014-03-07 18:29:04 +01:00
Clifford Wolf	54d74cf616	Added freduce -dump	2014-03-06 22:06:58 +01:00
Clifford Wolf	da5859a674	Added freduce -stop	2014-03-06 18:14:26 +01:00
Clifford Wolf	9b9c3327cc	Fixed undef handling in opt_reduce	2014-03-06 14:18:34 +01:00
Clifford Wolf	1ecaf1bb76	Added techmap -max_iter option	2014-03-06 12:15:17 +01:00
Clifford Wolf	96e753041d	fixed freduce for Minisat::SimpSolver: use frozen_literal()	2014-03-03 02:14:27 +01:00
Clifford Wolf	9e99984336	Fixed const folding of $bu0 cells	2014-02-27 04:09:32 +01:00
Clifford Wolf	548519875b	Fixed bug (typo) in passes/opt/opt_const.cc	2014-02-22 17:07:22 +01:00
Clifford Wolf	8b508dc90b	Added workaround for vhdl-style edge triggers from vhdl2verilog to proc_arst	2014-02-21 23:34:45 +01:00
Clifford Wolf	4e43cb7317	Added _TECHMAP_REPLACE_ feature to techmap	2014-02-20 23:42:07 +01:00
Clifford Wolf	737b71c735	Added "extract -ignore_parameters" and "extract -ignore_param ..."	2014-02-20 23:31:13 +01:00
Clifford Wolf	236fc4209c	Added "extract -map %<design_name>"	2014-02-20 23:30:15 +01:00
Clifford Wolf	483c99fe46	Added "design -push" and "design -pop"	2014-02-20 23:28:59 +01:00
Clifford Wolf	0dadfed46d	Added connwrappers command	2014-02-20 20:44:11 +01:00