Ben Widawsky
060e77c09b
intel_synth: Minor code cleanups
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Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2019-07-18 17:05:54 +01:00
Dan Ravensloft
4f798cda9d
synth_intel: Warn about untested Quartus backend
2019-07-07 19:26:31 +01:00
Ben Widawsky
05d8cc4567
Fix formatting for synth_intel.cc
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This is realized through the recently added .clang-format file.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2019-05-09 08:40:05 -07:00
Diego
643ae9bfc5
Fixing issues in CycloneV cell sim
2019-04-11 19:59:03 -05:00
Larry Doolittle
e2fc18f27b
Reduce amount of trailing whitespace in code base
2019-02-28 14:58:11 -08:00
Miodrag Milanovic
3b17c9018a
Unify usage of noflatten among architectures
2019-01-04 11:37:25 +01:00
whitequark
efa278e232
Fix typographical and grammatical errors and inconsistencies.
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The initial list of hits was generated with the codespell command
below, and each hit was evaluated and fixed manually while taking
context into consideration.
DIRS="kernel/ frontends/ backends/ passes/ techlibs/"
DIRS="${DIRS} libs/ezsat/ libs/subcircuit"
codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint
More hits were found by looking through comments and strings manually.
2019-01-02 13:12:17 +00:00
Diego H
819ca73096
Changes in GoWin synth commands and ALU primitive support
2018-12-03 20:08:35 -06:00
Henner Zeller
3aa4484a3c
Consistent use of 'override' for virtual methods in derived classes.
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o Not all derived methods were marked 'override', but it is a great
feature of C++11 that we should make use of.
o While at it: touched header files got a -*- c++ -*- for emacs to
provide support for that language.
o use YS_OVERRIDE for all override keywords (though we should probably
use the plain keyword going forward now that C++11 is established)
2018-07-20 23:51:06 -07:00
Clifford Wolf
b4c1d3084f
Add "synth_intel --noiopads"
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-04-30 13:02:56 +02:00
c60k28
efed2420d6
Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device
2018-03-31 22:48:47 -06:00
Clifford Wolf
9ac560f5d3
Add "dffinit -highlow" and fix synth_intel
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Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-01-09 18:42:19 +01:00
dh73
3fd1d61e2a
Initial Cyclone 10 support
2017-11-08 22:45:21 -06:00
Larry Doolittle
50bcd9a728
Clean whitespace and permissions in techlibs/intel
2017-10-05 16:23:49 +02:00
Clifford Wolf
65f91e5120
Rename "write_verilog -nobasenradix" to "write_verilog -decimal"
2017-10-03 17:31:21 +02:00
dh73
4718e65763
Tested and working altsyncarm without init files
2017-10-01 19:59:45 -05:00
dh73
cbaba62401
Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and M9K); M9K is not finished yet. Achronix Speedster also in this commit. Both Arria10 and Speedster-i are still experimental due complexity, but you can experiment around those devices right now
2017-10-01 11:04:17 -05:00
