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Author SHA1 Message Date
Miodrag Milanović
057dae4f78
Merge pull request #1399 from nakengelhardt/fix-show-macos 
fix show command for macos
 2019-09-23 20:06:40 +02:00
N. Engelhardt
2b81ce5648 add xdot dependency to Brewfile 2019-09-23 18:25:04 +02:00
N. Engelhardt
3bed4cb18a fix show command for macos 2019-09-23 17:47:05 +02:00
Clifford Wolf
0a2d8db793
Merge pull request #1392 from YosysHQ/eddie/fix1391 
(* techmap_autopurge *) fixes when ports aren't consistently-sized
 2019-09-21 11:25:36 +02:00
Eddie Hung
7c8de1dd18 Hell let's add the original #1381 testcase too 2019-09-20 17:58:51 -07:00
Eddie Hung
ec08a031b5 Revert abc9.cc 2019-09-20 17:52:23 -07:00
Eddie Hung
6258e6a7e2 Add testcase 2019-09-20 17:51:45 -07:00
Eddie Hung
72ce06909e Trim mismatched connection to be same (smallest) size 2019-09-20 17:51:36 -07:00
Eddie Hung
567e5f0aa7 Fix first testcase in #1391 2019-09-20 17:51:27 -07:00
Clifford Wolf
f3781f98db
Merge pull request #1386 from YosysHQ/clifford/fix1360 
Fix handling of read_verilog config in AstModule::reprocess_module()
 2019-09-20 13:30:28 +02:00
Clifford Wolf
8da0888bf6 Fix handling of read_verilog config in AstModule::reprocess_module(), fixes #1360 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-20 12:16:20 +02:00
Clifford Wolf
c072e00a39 Update CHANGELOG 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-20 10:28:20 +02:00
Clifford Wolf
1f64b34c64 Add "add -mod" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-20 10:27:17 +02:00
Clifford Wolf
db17833a5f
Merge pull request #1384 from YosysHQ/clifford/fix1381 
Add techmap_autopurge attribute
 2019-09-20 09:58:42 +02:00
Clifford Wolf
b76fac3ac3 Add techmap_autopurge attribute, fixes #1381 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-19 20:00:52 +02:00
Marcin Kościelnicki
13fa873f11 Use extractinv for synth_xilinx -ise 2019-09-19 04:02:48 +02:00
Marcin Kościelnicki
c9f9518de4 Added extractinv pass 2019-09-19 04:02:48 +02:00
Eddie Hung
70c607d7dd Document (* gentb_skip *) attr for test_autotb 2019-09-18 12:41:35 -07:00
Eddie Hung
b66c99ece0
Merge pull request #1355 from YosysHQ/eddie/peepopt_dffmuxext 
peepopt_dffmux -- bit optimisations for word level $dff + (enable/reset) $mux cells
 2019-09-18 12:40:08 -07:00
Eddie Hung
3ec28ec53a
Merge pull request #1379 from mmicko/sim_models 
Added simulation models for Efinix and Anlogic
 2019-09-18 10:04:27 -07:00
Miodrag Milanovic
3e9449cb0b make note that it is for latch mode 2019-09-18 17:48:16 +02:00
Miodrag Milanovic
b0ca6de472 better lut handling 2019-09-18 17:45:19 +02:00
Miodrag Milanovic
8badd4d812 better handling of lut and begin/end add 2019-09-18 17:45:07 +02:00
Clifford Wolf
779ce3537f Add "write_aiger -L" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-18 13:33:02 +02:00
Clifford Wolf
b88d2e5f30 Fix stupid bug in btor back-end 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-18 11:56:14 +02:00
Clifford Wolf
36df37a734 Bump version 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-16 13:05:41 +02:00
Clifford Wolf
861f2af5aa
Merge pull request #1380 from YosysHQ/clifford/fix1372 
Fix handling of range selects on loop variables
 2019-09-16 13:05:02 +02:00
Clifford Wolf
25b08b1afd Fix handling of range selects on loop variables, fixes #1372 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-16 11:25:37 +02:00
Eddie Hung
2b93b8fc74
Merge pull request #1374 from YosysHQ/eddie/fix1371 
Fix two non-deterministic behaviours that cause divergence between compilers
 2019-09-15 13:56:07 -07:00
Marcin Kościelnicki
09ac36da60 xilinx: Make blackbox library family-dependent. 
Fixes #1246.
 2019-09-15 13:37:24 +02:00
Clifford Wolf
d9f99745da
Merge pull request #1377 from YosysHQ/clifford/fixzdigit 
Fix handling of z_digit "?" and fix optimization of cmp with "z"
 2019-09-15 11:04:31 +02:00
Miodrag Milanovic
3487b95224 Added simulation models for Efinix and Anlogic 2019-09-15 09:37:16 +02:00
Eddie Hung
f492567c87 Oops 2019-09-13 18:19:07 -07:00
Eddie Hung
a2eee9ebef Add counter-example from @cliffordwolf 2019-09-13 16:41:10 -07:00
Eddie Hung
14d72c39c3 Revert "Make one check $shift(x)? only; change testcase to be 8b" 
This reverts commit e2c2d784c8.
 2019-09-13 16:33:18 -07:00
Eddie Hung
9a84e4711c Spacing 2019-09-13 16:30:44 -07:00
Eddie Hung
9a73adde50 Explicitly order function arguments 2019-09-13 16:18:05 -07:00
Eddie Hung
5473e597bf Use template specialisation 2019-09-13 11:13:57 -07:00
Eddie Hung
95e80809a5 Revert "SigSet<Cell*> to use stable compare class" 
This reverts commit 4ea34aaacd.
 2019-09-13 09:49:15 -07:00
Clifford Wolf
a67d63714b Fix handling of z_digit "?" and fix optimization of cmp with "z" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-13 13:39:39 +02:00
Clifford Wolf
4da6e19fe1
Merge pull request #1373 from YosysHQ/clifford/fix1364 
Fix lexing of integer literals
 2019-09-13 10:22:34 +02:00
Clifford Wolf
855e6a9b91 Fix lexing of integer literals without radix 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-13 10:19:58 +02:00
Eddie Hung
c487a8ff25 Grammar 2019-09-12 12:00:34 -07:00
Eddie Hung
c05a403dd1 static_assert to enforce this going forward 2019-09-12 11:45:17 -07:00
Eddie Hung
4ea34aaacd SigSet<Cell*> to use stable compare class 2019-09-12 11:45:02 -07:00
David Shah
6044fff074
Merge pull request #1370 from YosysHQ/dave/equiv_opt_multiclock 
Add equiv_opt -multiclock
 2019-09-12 12:26:28 +01:00
Clifford Wolf
7eb593829f Fix lexing of integer literals, fixes #1364 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-12 09:43:32 +02:00
Eddie Hung
3a49aa6b4a Tidy up 2019-09-11 14:20:49 -07:00
Eddie Hung
817ac7c5e0 Fix UB 2019-09-11 14:18:02 -07:00
Eddie Hung
bdb5e0f29c Cope with presence of reset muxes too 2019-09-11 13:36:37 -07:00