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2 commits

Author SHA1 Message Date
Miodrag Milanovic
3238ee7d35 check muxes per type 2019-10-04 11:04:18 +02:00
SergeyDegtyar
27377c4663 Add new tests for Anlogic architecture 
Problems/questions:
	- memory.ys: ERROR: Failed to import cell gate.mem.0.0.0 (type
EG_LOGIC_DRAM16X4) to SAT database.
		Why EG_LOGIC_DRAM16X4, not AL_LOGIC_BRAM?
	- Internal cell type $_TBUF_  is present.
 2019-09-23 12:12:02 +03:00