3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-22 08:35:32 +00:00
Commit graph

12 commits

Author SHA1 Message Date
Miodrag Milanovic
596506b88b Add NX_XCDC_U to wrappers 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
4aaab8f395 start adding wfg model 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
f4d8ea4c40 Start adding RFB simulation models 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
f9f68c3cd1 Split sim models into multiple files and implement few 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
b202126c76 IOM 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
8f42d6dace fifo 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
012f0e2952 memory blocks 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
3ed5ea24b2 sortout more blackboxes 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
0ecc2e597f PLLs 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
ce635abc21 NX_DSP/SPLIT 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
60611b936b CDC_U 2024-08-15 17:50:36 +02:00
Miodrag Milanovic
827ea11503 start splitting blackboxes and add wrapper techmap 2024-08-15 17:50:36 +02:00