Krystine Sherwin
2703aa34d1
synth_analogdevices: Add -memprefix opt
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Also fix line length in opening paragraph.
2025-11-14 12:10:15 +13:00
Krystine Sherwin
51e6f151c6
analogdevices: Fix INIT_FILE on small mem
2025-11-14 12:08:36 +13:00
Krystine Sherwin
3787ea19cd
tests/memfile: Test dump_meminit
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Change tests/memfile to a mktest, moving the prior run-test.sh contents into a new read_dir.sh.
Add dump.ys (and friends) for testing dump_meminit.
2025-11-14 11:47:40 +13:00
Krystine Sherwin
7d79c11ca9
dump_meminit: Add -prefix option
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Fix crash on missing INIT param.
2025-11-14 11:47:14 +13:00
Krystine Sherwin
ac08540278
analogdevices: Fixup SP2_1024x18_BP
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Was incorrectly _FP, and SDP_1024x18_FP for T40LP was missing.
2025-11-14 10:14:36 +13:00
Krystine Sherwin
11edbf52d5
analogdevices: Use dump_meminit
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Add `INIT_FILE` and `SIM_INIT_BEHAVIOR` parameters.
Add `init any` to non-full ADI ram blocks.
2025-11-14 10:14:36 +13:00
Krystine Sherwin
c9c53876b4
WIP dump_meminit
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Developed for synth_analogdevices, but there's no reason it couldn't be used for others.
2025-11-14 10:14:35 +13:00
Lofty
8fad004fb8
synth_analogdevices: update timing model and tests
2025-11-12 22:44:12 +00:00
Lofty
6ccd1da030
analogdevices: double LUT RAM cost
2025-11-12 22:44:12 +00:00
Lofty
8ff0039141
analogdevices: ignore $assert cells
2025-11-12 22:44:12 +00:00
Krystine Sherwin
d7248303c6
analogdevices: Extra tests
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`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.
2025-11-12 22:44:12 +00:00
Krystine Sherwin
27001cf959
analogdevices: Fixing up bram
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Tested all the accepted configurations in eXpreso, disabling the RBRAM2 configs that fail to place, and increasing the cost for the double site TDP memories.
2025-11-12 22:44:12 +00:00
Krystine Sherwin
801db868a9
analogdevices: Add BRAM options
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Enable `-force-params`, and tidy up lutram mapping too.
2025-11-12 22:44:12 +00:00
Krystine Sherwin
ab33348d27
memory_libmap: Add -force-params
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Reduce complexity for adi brams by unconditionally providing the WIDTH and ABITS parameters.
2025-11-12 22:44:12 +00:00
Lofty
ed29e75cda
analogdevices: LUT RAM only on positive edge
2025-11-12 22:44:12 +00:00
Lofty
ae34fcb82c
analogdevices: DSP tweaks
2025-11-12 22:44:12 +00:00
Lofty
e189ee10aa
analogdevices: DSP inference
2025-11-12 22:44:12 +00:00
Lofty
a1a0926316
analogdevices: remove cells_xtra
2025-11-12 22:44:12 +00:00
Lofty
e62a91a793
analogdevices: timings for t40lp
2025-11-12 22:44:12 +00:00
Lofty
764c2e160b
analogdevices: use single tech param
2025-11-12 22:44:12 +00:00
Lofty
0b6aea3ed9
analogdevices: expreso does not care about clock buffers
2025-11-12 22:44:12 +00:00
Lofty
6c4327da04
analogdevices: prepare for t40lp timings
2025-11-12 22:44:12 +00:00
Krystine Sherwin
4690ef36ce
analogdevices: Adding RBRAM2 and -tech
2025-11-12 22:44:12 +00:00
Krystine Sherwin
9d887dbc81
analogdevices: (some) Native BRAM
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Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy).
Drop the unused defines from the synth pass.
Remove comments from the lutram files referencing xilinx.
2025-11-12 22:44:12 +00:00
Krystine Sherwin
3cf01c399a
analogdevices: Update lutram.ys test
2025-11-12 22:44:12 +00:00
Krystine Sherwin
519c57ba61
analogdevices: Native LUTRAM primitives
2025-11-12 22:44:12 +00:00
Lofty
59cde69540
analogdevices: LUTRAM config
2025-11-12 22:44:12 +00:00
Lofty
3870976bcc
analogdevices: update timing model
2025-11-12 22:44:12 +00:00
Lofty
c0b789f6de
I thought I removed this...
2025-11-12 22:44:12 +00:00
Lofty
8985116b3e
analogdevices: user retargeting
2025-11-12 22:44:12 +00:00
Lofty
c250831b32
analogdevices: more housekeeping
2025-11-12 22:44:12 +00:00
Lofty
0b00c794df
analogdevices: remove some extra cells!
2025-11-12 22:44:12 +00:00
Lofty
8651e3ac89
test suite
2025-11-12 22:44:11 +00:00
Lofty
28600c7f9f
synth_analogdevices: remove scopeinfo cells
2025-11-12 22:44:11 +00:00
Lofty
384964bcf7
Create synth_analogdevices
2025-11-12 22:44:11 +00:00
Emil J
d93039a194
Merge pull request #5417 from rocallahan/idstring-gc
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Implement garbage collection of `IdString`s
2025-11-12 13:43:53 +01:00
Emil J. Tywoniak
ae281720cf
tests: remove unstable FPGA synthesis result checks
2025-11-12 11:52:04 +01:00
Robert O'Callahan
578d658871
Add timing stats for IdString garbage collection
2025-11-12 11:52:04 +01:00
Robert O'Callahan
8c2984dc5f
Fix AbcModuleState::remap_name() to avoid calling IdString::c_str()
2025-11-12 11:52:04 +01:00
Robert O'Callahan
c4c389fdd7
Fix verilog backend to avoid IdString::c_str()
2025-11-12 11:52:04 +01:00
Robert O'Callahan
325b27f43a
Avoid calling IdString::c_str() in opt_clean
2025-11-12 11:52:04 +01:00
Robert O'Callahan
df8444c5e7
Optimize IdString operations to avoid calling c_str()
2025-11-12 11:52:04 +01:00
Robert O'Callahan
e95ed7bbab
Make NEW_ID create IDs whose string allocation is delayed
2025-11-12 11:52:04 +01:00
Robert O'Callahan
8895757364
Ensure that new_id(_suffix)() cannot create collisions with existing IdStrings.
2025-11-12 11:52:04 +01:00
Robert O'Callahan
9577a028c8
Make new_id/new_id_suffix taking string_view to avoid allocating strings
2025-11-12 11:52:04 +01:00
Robert O'Callahan
b3f3f42577
Remove StaticIdString and just use IdString now that we can make it constexpr
2025-11-12 11:52:04 +01:00
Robert O'Callahan
b0e2d75dbe
Make IdString refcounts a hashtable containing only the nonzero refcounts
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This saves space and doesn't cost very much since we hardly ever have nonzero refcounts any more.
It also allows for IdStrings with negative indexes, which we're going to add.
2025-11-12 11:52:04 +01:00
Robert O'Callahan
54bde15329
Implement IdString garbage collection instead of refcounting.
2025-11-12 11:52:04 +01:00
Robert O'Callahan
5133b4bdea
Create RTLIL::OwningIdString and use it in a few places
2025-11-12 11:52:04 +01:00
Robert O'Callahan
d28f97e9da
Remove YOSYS_USE_STICKY_IDS
2025-11-12 11:52:04 +01:00
