6 commits

Author	SHA1	Message	Date
Emil J. Tywoniak	73d51b25d6	s/NEW_ID/NEWER_ID/g	2025-09-16 17:50:56 +02:00
Robert O'Callahan	2d5ce8c363	Update passes/proc to avoid bits()	2025-09-16 03:17:23 +00:00
Krystine Sherwin	ab0e3cc05f	Proc: Use selections consistently ... All `proc_*` passes now use the same module and process for loops, using `design->all_selected_modules()` and `mod->selected_processes()` respectively. This simplifies the code, and makes the couple `proc_*` passes that were ignoring boxed modules stop doing that (which seems to have been erroneous rather than intentional).	2025-05-31 12:04:42 +12:00
Emil J. Tywoniak	785bd44da7	rtlil: represent Const strings as std::string	2024-10-14 06:28:12 +02:00
Marcelina Kościelnicka	24027b5446	proc_memwr: Use the v2 memwr cell.	2021-08-11 13:34:10 +02:00
Marcelina Kościelnicka	4e03865d5b	Add support for memory writes in processes.	2021-03-08 20:16:29 +01:00