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Code Activity
14841 commits 93 branches 53 tags 45 MiB
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1891 commits

Author SHA1 Message Date
Eddie Hung
699d8e3939 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-07-01 10:44:42 -07:00
Eddie Hung
b3f162e94e Replace log_assert() with meaningful log_error() 2019-06-28 12:54:44 -07:00
Clifford Wolf
af74409749 Improve specify dummy parser, fixes #1144 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-28 10:21:16 +02:00
Eddie Hung
9398921af1 Refactor for one "abc_carry" attribute on module 2019-06-27 16:07:14 -07:00
Eddie Hung
469f98b6bd Remove unneeded include 2019-06-27 11:20:40 -07:00
Eddie Hung
6c256b8cda Merge origin/master 2019-06-27 11:20:15 -07:00
Clifford Wolf
f6053b8810 Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-26 11:09:43 +02:00
Eddie Hung
cec2292b0b Merge remote-tracking branch 'origin/master' into xaig 2019-06-24 20:01:43 -07:00
Eddie Hung
1abe93e48d Merge remote-tracking branch 'origin/master' into xaig 2019-06-21 17:43:29 -07:00
Eddie Hung
f2ead4334a Reduce log_debug spam in parse_xaiger() 2019-06-21 17:33:49 -07:00
Eddie Hung
b75863ca3f Workaround issues exposed by gcc-4.8 2019-06-21 14:31:09 -07:00
Miodrag Milanovic
50e7221077 Add upto and offset to JSON ports 2019-06-21 19:47:25 +02:00
Miodrag Milanovic
3775763f51 Fix typo 2019-06-21 19:09:34 +02:00
Clifford Wolf
f15def325c Added JSON upto and offset 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-21 15:22:17 +02:00
Clifford Wolf
78e7a6f6f2
Merge pull request #1119 from YosysHQ/eddie/fix1118 
Make genvar a signed type
 2019-06-21 10:13:13 +02:00
Eddie Hung
9faeba7a66 Fix broken abc9.v test due to inout being 1'bx 2019-06-20 19:41:27 -07:00
Eddie Hung
e612dade12 Merge remote-tracking branch 'origin/master' into xaig 2019-06-20 19:00:36 -07:00
Eddie Hung
014606affe Fix issue with part of PI being 1'bx 2019-06-20 17:38:16 -07:00
Eddie Hung
c27ab609fa Make genvar a signed type 2019-06-20 16:04:12 -07:00
Eddie Hung
20119ee50e Maintain "is_unsized" state of constants 2019-06-20 12:43:39 -07:00
Clifford Wolf
2428fb7dc2 Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towoe-unpacked_arrays 2019-06-20 12:03:00 +02:00
Clifford Wolf
ec4565009a Add "read_verilog -pwires" feature, closes #1106 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-19 14:38:50 +02:00
Tobias Wölfel
8b8af10f5e Unpacked array declaration using size 
Allows fixed-sized array dimension specified by a single number.

This commit is based on the work from PeterCrozier
https://github.com/YosysHQ/yosys/pull/560.
But is split out of the original work.
 2019-06-19 12:47:48 +02:00
Clifford Wolf
8d0cd529c9 Add defaultvalue attribute 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-19 11:37:11 +02:00
Clifford Wolf
6d64e242ba Fix handling of "logic" variables with initial value 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-19 11:25:11 +02:00
Eddie Hung
0c59bc0b75 Cleanup 2019-06-16 10:42:00 -07:00
Eddie Hung
fb90d8c18c Cleanup 2019-06-16 09:34:26 -07:00
Eddie Hung
3d1185b835 Read init from outputs 2019-06-15 22:41:42 -07:00
Eddie Hung
c04921c3a8 Fix debug message 2019-06-15 18:13:44 -07:00
Eddie Hung
b706ae82de Fix log_debug messages 2019-06-15 12:42:18 -07:00
Eddie Hung
7a3c403ba0 Missing close bracket 2019-06-15 09:10:01 -07:00
Eddie Hung
2ef2aa997c read_aiger to not require clk_name for latches, plus debug 2019-06-15 09:07:53 -07:00
Eddie Hung
7876b5b8be Cover __APPLE__ too for little to big endian 2019-06-14 12:40:51 -07:00
Eddie Hung
a48b5bfaa5 Further cleanup based on @daveshah1 2019-06-14 12:25:06 -07:00
Eddie Hung
97d2656375 Resolve comments from @daveshah1 2019-06-14 12:00:02 -07:00
Eddie Hung
a3be25ab0d Cleanup 2019-06-14 10:27:30 -07:00
Eddie Hung
d005568f2e Add TODO to parse_xaiger 2019-06-14 10:11:13 -07:00
Eddie Hung
bc22e2e3ee Optimise some more 2019-06-13 17:02:58 -07:00
Eddie Hung
d09d4e0706 Move ConstEvalAig to aigerparse.cc 2019-06-13 16:28:11 -07:00
Eddie Hung
d39a5a77a9 Add ConstEvalAig specialised for AIGs 2019-06-13 13:13:48 -07:00
Eddie Hung
342fc0a600 parse_xaiger to cope with inouts 2019-06-12 15:45:46 -07:00
Eddie Hung
b21d29598a Consistency 2019-06-12 09:40:51 -07:00
Eddie Hung
f7a9769c14 Merge remote-tracking branch 'origin/master' into xaig 2019-06-12 08:50:39 -07:00
Udi Finkelstein
4b56f6646d Fixed brojen $error()/$info/$warning() on non-generate blocks 
(within always/initial blocks)
 2019-06-11 02:52:06 +03:00
Eddie Hung
2b350401c4 Fix spacing from spaces to tabs 2019-06-07 15:44:57 -07:00
Eddie Hung
6934f4bdd5 Fix spacing (entire file is wrong anyway, will fix later) 2019-06-07 11:30:36 -07:00
Eddie Hung
d00ae1d6a8 Remove unnecessary std::getline() for ASCII 2019-06-07 11:28:25 -07:00
Eddie Hung
a04521c6b7 Fix read_aiger -- create zero driver, fix init width, parse 'b' 2019-06-07 11:07:15 -07:00
Clifford Wolf
211d85cfcc Fixes and cleanups in AST_TECALL handling 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-06-07 12:41:09 +02:00
Clifford Wolf
a3bbc5365b Merge branch 'pr_elab_sys_tasks' of https://github.com/udif/yosys into clifford/pr983 2019-06-07 12:08:42 +02:00