fayalite/crates/fayalite/tests/sim/expected/extern_module2.vcd
Jacob Lifshay a115585d5a
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simulator: allow external module generators to wait for value changes and/or clock edges
2025-03-25 18:26:48 -07:00

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$timescale 1 ps $end
$scope module extern_module2 $end
$var wire 1 ! en $end
$var wire 1 " clk $end
$var wire 8 # o $end
$upscope $end
$enddefinitions $end
$dumpvars
1!
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b1001000 #
$end
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