fayalite/Cargo.toml
Jacob Lifshay 6a5f1b8af1
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prep for eventual publishing
2024-07-11 22:39:00 -07:00

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TOML

# SPDX-License-Identifier: LGPL-3.0-or-later
# See Notices.txt for copyright information
[workspace]
resolver = "2"
members = ["crates/*"]
[workspace.package]
version = "0.1.0"
license = "LGPL-3.0-or-later"
edition = "2021"
repository = "https://git.libre-chip.org/libre-chip/fayalite"
keywords = ["hdl", "hardware", "semiconductors", "firrtl", "fpga"]
categories = ["simulation", "development-tools", "compilers"]
rust-version = "1.79"
[workspace.dependencies]
fayalite-proc-macros = { version = "=0.1.0", path = "crates/fayalite-proc-macros" }
fayalite-proc-macros-impl = { version = "=0.1.0", path = "crates/fayalite-proc-macros-impl" }
fayalite-visit-gen = { version = "=0.1.0", path = "crates/fayalite-visit-gen" }
base16ct = "0.2.0"
bitvec = { version = "1.0.1", features = ["serde"] }
hashbrown = "0.14.3"
indexmap = { version = "2.2.6", features = ["serde"] }
num-bigint = "0.4.4"
num-traits = "0.2.16"
prettyplease = "0.2.20"
proc-macro2 = "1.0.83"
quote = "1.0.36"
serde = { version = "1.0.202", features = ["derive"] }
serde_json = { version = "1.0.117", features = ["preserve_order"] }
sha2 = "0.10.8"
syn = { version = "2.0.66", features = ["full", "fold", "visit", "extra-traits"] }
tempfile = "3.10.1"
thiserror = "1.0.61"
trybuild = "1.0"