Fayalite

Fayalite is a library for designing digital hardware -- a hardware description language (HDL) embedded in the Rust programming language. Fayalite's semantics are based on FIRRTL as interpreted by LLVM CIRCT.

Building the Blinky example for the Arty A7 100T on Linux

This uses the container image containing all the external programs and files that Fayalite needs to build for FPGAs, the sources for the container image are in https://git.libre-chip.org/libre-chip/fayalite-deps

Steps:

Install podman (or docker).

Run:

podman run --rm --security-opt label=disable --volume="$(pwd):$(pwd)" -w="$(pwd)" -it git.libre-chip.org/libre-chip/fayalite-deps:latest cargo run --example blinky yosys-nextpnr-xray --nextpnr-xilinx-chipdb-dir /opt/fayalite-deps/nextpnr-xilinx/xilinx --prjxray-db-dir /opt/fayalite-deps/prjxray-db --platform arty-a7-100t -o target/blinky-out

To actually program the FPGA, you'll need to install openFPGALoader on your host OS:

On Debian 12:

sudo apt update && sudo apt install openfpgaloader

Then program the FPGA:

sudo openFPGALoader --board arty_a7_100t target/blinky-out/blinky.bit

This will program the FPGA but leave the Flash chip unmodified, so the FPGA will revert when the board is power-cycled.

To program the Flash also, so it stays programmed when power-cycling the board:

sudo openFPGALoader --board arty_a7_100t -f target/blinky-out/blinky.bit

Funding

NLnet Grants

• Libre-Chip CPU with proof of No Spectre bugs 2024-12-324 (progress)

This project was funded through the NGI0 Commons Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement № 101135429. Additional funding is made available by the Swiss State Secretariat for Education, Research and Innovation (SERI).