History

Jacob Lifshay cb17913004 All checks were successful / test (push) Successful in 46m32s Details limit sby to one thread each since it seems not to respect job count in parallel mode		2024-10-15 21:32:38 -07:00
..
examples	change register names to end in `_reg` by convention	2024-10-06 18:50:09 -07:00
src	limit sby to one thread each since it seems not to respect job count in parallel mode	2024-10-15 21:32:38 -07:00
tests	get #[hdl] struct S<A: KnownSize, B: KnownSize> to work	2024-10-11 17:30:49 -07:00
build.rs	WIP: use HdlOption[the_type_var] or UInt[123 + n] for creating types	2024-08-21 22:27:21 -07:00
Cargo.toml	switch to using a make job server for managing test parallelism	2024-10-15 20:32:33 -07:00
LICENSE.md	prep for eventual publishing	2024-07-11 22:39:00 -07:00
Notices.txt	prep for eventual publishing	2024-07-11 22:39:00 -07:00
README.md	prep for eventual publishing	2024-07-11 22:39:00 -07:00
visit_types.json	change NameId to have an opaque Id so output firrtl doesn't depend on how many modules of the same name were ever created	2024-10-07 19:06:01 -07:00

README.md

Fayalite

Fayalite is a library for designing digital hardware -- a hardware description language (HDL) embedded in the Rust programming language. Fayalite's semantics are based on FIRRTL as interpreted by LLVM CIRCT.