84 lines
		
	
	
	
		
			3.5 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
			
		
		
	
	
			84 lines
		
	
	
	
		
			3.5 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
| <!--
 | |
| SPDX-License-Identifier: LGPL-3.0-or-later
 | |
| See Notices.txt for copyright information
 | |
| -->
 | |
| # Fayalite
 | |
| 
 | |
| Fayalite is a library for designing digital hardware -- a hardware description language (HDL) embedded in the Rust programming language. Fayalite's semantics are based on [FIRRTL] as interpreted by [LLVM CIRCT](https://circt.llvm.org/docs/Dialects/FIRRTL/FIRRTLAnnotations/).
 | |
| 
 | |
| [FIRRTL]: https://github.com/chipsalliance/firrtl-spec
 | |
| 
 | |
| # Building the [Blinky example] for the Arty A7 100T on Linux
 | |
| 
 | |
| [Blinky example]: crates/fayalite/examples/blinky.rs
 | |
| 
 | |
| This uses the container image containing all the external programs and files that Fayalite needs to build for FPGAs, the sources for the container image are in <https://git.libre-chip.org/libre-chip/fayalite-deps>
 | |
| 
 | |
| Steps:
 | |
| 
 | |
| Install podman (or docker).
 | |
| 
 | |
| Run:
 | |
| ```bash
 | |
| podman run --rm --security-opt label=disable --volume="$(pwd):$(pwd)" -w="$(pwd)" -it git.libre-chip.org/libre-chip/fayalite-deps:latest cargo run --example blinky yosys-nextpnr-xray --nextpnr-xilinx-chipdb-dir /opt/fayalite-deps/nextpnr-xilinx/xilinx --prjxray-db-dir /opt/fayalite-deps/prjxray-db --platform arty-a7-100t -o target/blinky-out
 | |
| ```
 | |
| 
 | |
| To actually program the FPGA, you'll need to install [openFPGALoader] on your host OS:
 | |
| 
 | |
| [openFPGALoader]: https://github.com/trabucayre/openFPGALoader
 | |
| 
 | |
| On Debian 12:
 | |
| ```bash
 | |
| sudo apt update && sudo apt install openfpgaloader
 | |
| ```
 | |
| 
 | |
| Then program the FPGA:
 | |
| ```bash
 | |
| sudo openFPGALoader --board arty_a7_100t target/blinky-out/blinky.bit
 | |
| ```
 | |
| 
 | |
| This will program the FPGA but leave the Flash chip unmodified, so the FPGA will revert when the board is power-cycled.
 | |
| 
 | |
| To program the Flash also, so it stays programmed when power-cycling the board:
 | |
| 
 | |
| ```bash
 | |
| sudo openFPGALoader --board arty_a7_100t -f target/blinky-out/blinky.bit
 | |
| ```
 | |
| 
 | |
| # Building the [Transmit-only UART example] for the Arty A7 100T on Linux
 | |
| 
 | |
| [Transmit-only UART example]: crates/fayalite/examples/tx_only_uart.rs
 | |
| 
 | |
| Follow the steps above of building the Blinky example, but replace `blinky` with `tx_only_uart`.
 | |
| 
 | |
| View the output using [tio](https://github.com/tio/tio) which you can install in Debian using `apt`.
 | |
| 
 | |
| Find the correct USB device:
 | |
| ```bash
 | |
| sudo tio --list
 | |
| ```
 | |
| 
 | |
| You want the device with a name like (note the `if01`, `if00` is presumably the JTAG port):
 | |
| `/dev/serial/by-id/usb-Digilent_Digilent_USB_Device_210319B4A51E-if01-port0`
 | |
| 
 | |
| Connect to the serial port:
 | |
| ```bash
 | |
| sudo tio -b115200 /dev/serial/by-id/put-your-device-id-here
 | |
| ```
 | |
| 
 | |
| You'll see (repeating endlessly):
 | |
| ```text
 | |
| Hello World from Fayalite!!!
 | |
| Hello World from Fayalite!!!
 | |
| Hello World from Fayalite!!!
 | |
| ```
 | |
| 
 | |
| Press Ctrl+T then `q` to exit tio.
 | |
| 
 | |
| # Funding
 | |
| 
 | |
| ## NLnet Grants
 | |
| 
 | |
| * [Libre-Chip CPU with proof of No Spectre bugs](https://nlnet.nl/project/Libre-Chip-proof/) 2024-12-324 [(progress)](https://git.libre-chip.org/libre-chip/grant-tracking/src/branch/master/nlnet-2024-12-324/progress.md)
 | |
| 
 | |
| This project was funded through the [NGI0 Commons Fund](https://nlnet.nl/commonsfund), a fund established by [NLnet](https://nlnet.nl/) with financial support from the European Commission's [Next Generation Internet](https://ngi.eu) programme, under the aegis of [DG Communications Networks, Content and Technology](https://commission.europa.eu/about-european-commission/departments-and-executive-agencies/communications-networks-content-and-technology_en) under grant agreement № [101135429](https://cordis.europa.eu/project/id/101135429). Additional funding is made available by the [Swiss State Secretariat for Education, Research and Innovation](https://www.sbfi.admin.ch/sbfi/en/home.html) (SERI).
 |