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change vcd output to have module contents under instance's name, more closely matching how it works in verilog #68

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programmerjake merged 1 commit from programmerjake/fayalite:make_vcd_modules_use_instance_names into master 2026-03-27 02:19:16 +00:00
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programmerjake commented 2026-03-27 02:14:54 +00:00
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programmerjake added 1 commit 2026-03-27 02:14:54 +00:00
change vcd output to have module contents under instance's name, more closely matching how it works in verilog
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programmerjake scheduled this pull request to auto merge when all checks succeed 2026-03-27 02:15:01 +00:00
programmerjake merged commit 80b92c7dd3 into master 2026-03-27 02:19:16 +00:00
programmerjake deleted branch make_vcd_modules_use_instance_names 2026-03-27 02:19:16 +00:00
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Reference: libre-chip/fayalite#68
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Delete branch "programmerjake/fayalite:make_vcd_modules_use_instance_names"

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