implement simulation of extern modules

crates/fayalite/src/firrtl.rs

@@ -2258,6 +2258,7 @@ impl<'a> Exporter<'a> {
             ModuleBody::Extern(ExternModuleBody {
                 verilog_name,
                 parameters,
+                simulation: _,
             }) => {
                 let verilog_name = Ident(verilog_name);
                 writeln!(body, "{indent}defname = {verilog_name}").unwrap();

crates/fayalite/src/module.rs

@@ -21,6 +21,7 @@ use crate::{
     memory::{Mem, MemBuilder, MemBuilderTarget, PortName},
     reg::Reg,
     reset::{AsyncReset, Reset, ResetType, ResetTypeDispatch, SyncReset},
+    sim::{ExternModuleSimGenerator, ExternModuleSimulation},
     source_location::SourceLocation,
     ty::{CanonicalType, Type},
     util::ScopedRef,
@@ -1081,6 +1082,7 @@ pub struct ExternModuleBody<
 > {
     pub verilog_name: Interned<str>,
     pub parameters: P,
+    pub simulation: Option<ExternModuleSimulation<Bundle>>,
 }
 
 impl From<ExternModuleBody<Vec<ExternModuleParameter>>> for ExternModuleBody {
@@ -1088,11 +1090,13 @@ impl From<ExternModuleBody<Vec<ExternModuleParameter>>> for ExternModuleBody {
         let ExternModuleBody {
             verilog_name,
             parameters,
+            simulation,
         } = value;
         let parameters = Intern::intern_owned(parameters);
         Self {
             verilog_name,
             parameters,
+            simulation,
         }
     }
 }
@@ -1283,10 +1287,12 @@ impl<T: BundleType> fmt::Debug for DebugModuleBody<T> {
             ModuleBody::Extern(ExternModuleBody {
                 verilog_name,
                 parameters,
+                simulation,
             }) => {
                 debug_struct
                     .field("verilog_name", verilog_name)
-                    .field("parameters", parameters);
+                    .field("parameters", parameters)
+                    .field("simulation", simulation);
             }
         }
         debug_struct.finish_non_exhaustive()
@@ -1761,7 +1767,12 @@ impl AssertValidityState {
             ModuleBody::Extern(ExternModuleBody {
                 verilog_name: _,
                 parameters: _,
-            }) => {}
+                simulation,
+            }) => {
+                if let Some(simulation) = simulation {
+                    simulation.check_io_ty(self.module.io_ty);
+                }
+            }
             ModuleBody::Normal(NormalModuleBody { body }) => {
                 let body = self.make_block_index(body);
                 assert_eq!(body, 0);
@@ -2108,6 +2119,7 @@ impl ModuleBuilder {
             ModuleKind::Extern => ModuleBody::Extern(ExternModuleBody {
                 verilog_name: name.0,
                 parameters: vec![],
+                simulation: None,
             }),
             ModuleKind::Normal => ModuleBody::Normal(NormalModuleBody {
                 body: BuilderModuleBody {
@@ -2229,6 +2241,15 @@ impl ModuleBuilder {
                 value: ExternModuleParameterValue::RawVerilog(raw_verilog.intern()),
             });
     }
+    #[track_caller]
+    pub fn extern_module_simulation<G: ExternModuleSimGenerator>(&self, generator: G) {
+        let mut impl_ = self.impl_.borrow_mut();
+        let simulation = &mut impl_.body.builder_extern_body().simulation;
+        if simulation.is_some() {
+            panic!("already added an extern module simulation");
+        }
+        *simulation = Some(ExternModuleSimulation::new(generator));
+    }
 }
 
 #[track_caller]

crates/fayalite/src/module/transform/visit.rs

@@ -31,6 +31,7 @@ use crate::{
     phantom_const::PhantomConst,
     reg::Reg,
     reset::{AsyncReset, Reset, ResetType, SyncReset},
+    sim::ExternModuleSimulation,
     source_location::SourceLocation,
     ty::{CanonicalType, Type},
     wire::Wire,

crates/fayalite/tests/sim.rs

@@ -5,11 +5,14 @@ use fayalite::{
     int::UIntValue,
     prelude::*,
     reset::ResetType,
-    sim::{time::SimDuration, vcd::VcdWriterDecls, Simulation, ToSimValue},
+    sim::{
+        time::SimDuration, vcd::VcdWriterDecls, ExternModuleSimGenerator,
+        ExternModuleSimulationState, Simulation, ToSimValue,
+    },
     ty::StaticType,
     util::RcWriter,
 };
-use std::num::NonZeroUsize;
+use std::{future::IntoFuture, num::NonZeroUsize};
 
 #[hdl_module(outline_generated)]
 pub fn connect_const() {
@@ -1443,3 +1446,61 @@ fn test_conditional_assignment_last() {
         panic!();
     }
 }
+
+#[hdl_module(outline_generated, extern)]
+pub fn extern_module() {
+    #[hdl]
+    let i: Bool = m.input();
+    #[hdl]
+    let o: Bool = m.output();
+    #[derive(Clone, Eq, PartialEq, Hash, Debug)]
+    struct Sim {
+        i: Expr<Bool>,
+        o: Expr<Bool>,
+    }
+    impl ExternModuleSimGenerator for Sim {
+        type IOType = extern_module;
+
+        fn run<'a>(
+            &'a self,
+            mut sim: ExternModuleSimulationState<Self::IOType>,
+        ) -> impl IntoFuture<Output = ()> + 'a {
+            let Self { i, o } = *self;
+            async move {
+                sim.write(o, true).await;
+                sim.advance_time(SimDuration::from_nanos(500)).await;
+                let mut invert = false;
+                loop {
+                    sim.advance_time(SimDuration::from_micros(1)).await;
+                    let v = sim.read_bool(i).await;
+                    sim.write(o, v ^ invert).await;
+                    invert = !invert;
+                }
+            }
+        }
+    }
+    m.extern_module_simulation(Sim { i, o });
+}
+
+#[test]
+fn test_extern_module() {
+    let _n = SourceLocation::normalize_files_for_tests();
+    let mut sim = Simulation::new(extern_module());
+    let mut writer = RcWriter::default();
+    sim.add_trace_writer(VcdWriterDecls::new(writer.clone()));
+    sim.write(sim.io().i, false);
+    sim.advance_time(SimDuration::from_micros(10));
+    sim.write(sim.io().i, true);
+    sim.advance_time(SimDuration::from_micros(10));
+    sim.flush_traces().unwrap();
+    let vcd = String::from_utf8(writer.take()).unwrap();
+    println!("####### VCD:\n{vcd}\n#######");
+    if vcd != include_str!("sim/expected/extern_module.vcd") {
+        panic!();
+    }
+    let sim_debug = format!("{sim:#?}");
+    println!("#######\n{sim_debug}\n#######");
+    if sim_debug != include_str!("sim/expected/extern_module.txt") {
+        panic!();
+    }
+}

crates/fayalite/tests/sim/expected/conditional_assignment_last.txt

@@ -92,7 +92,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::conditional_assignment_last,
+                instantiated: Module {
+                    name: conditional_assignment_last,
+                    ..
+                },
+            }.i,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::conditional_assignment_last,
@@ -100,37 +110,12 @@ Simulation {
                     name: conditional_assignment_last,
                     ..
                 },
-        }.i: CompiledValue {
+            }.i,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(conditional_assignment_last: conditional_assignment_last).conditional_assignment_last::i",
-                                ty: Bool,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "conditional_assignment_last",
         children: [

crates/fayalite/tests/sim/expected/connect_const.txt

@@ -68,7 +68,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::connect_const,
+                instantiated: Module {
+                    name: connect_const,
+                    ..
+                },
+            }.o,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::connect_const,
@@ -76,37 +86,12 @@ Simulation {
                     name: connect_const,
                     ..
                 },
-        }.o: CompiledValue {
+            }.o,
-            layout: CompiledTypeLayout {
-                ty: UInt<8>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(connect_const: connect_const).connect_const::o",
-                                ty: UInt<8>,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "connect_const",
         children: [

crates/fayalite/tests/sim/expected/connect_const_reset.txt

@@ -97,7 +97,24 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::connect_const_reset,
+                instantiated: Module {
+                    name: connect_const_reset,
+                    ..
+                },
+            }.reset_out,
+            Instance {
+                name: <simulator>::connect_const_reset,
+                instantiated: Module {
+                    name: connect_const_reset,
+                    ..
+                },
+            }.bit_out,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::connect_const_reset,
@@ -105,71 +122,19 @@ Simulation {
                     name: connect_const_reset,
                     ..
                 },
-        }.bit_out: CompiledValue {
+            }.bit_out,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(connect_const_reset: connect_const_reset).connect_const_reset::bit_out",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::connect_const_reset,
                 instantiated: Module {
                     name: connect_const_reset,
                     ..
                 },
-        }.reset_out: CompiledValue {
+            }.reset_out,
-            layout: CompiledTypeLayout {
-                ty: AsyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(connect_const_reset: connect_const_reset).connect_const_reset::reset_out",
-                                ty: AsyncReset,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "connect_const_reset",
         children: [

crates/fayalite/tests/sim/expected/counter_async.txt

@@ -203,7 +203,24 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.count,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::counter,
@@ -211,205 +228,33 @@ Simulation {
                     name: counter,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: AsyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.rst",
-                                ty: AsyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: AsyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: AsyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: AsyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: AsyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.count: CompiledValue {
+            }.count,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::count",
-                                ty: UInt<4>,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "counter",
         children: [

crates/fayalite/tests/sim/expected/counter_sync.txt

@@ -184,7 +184,24 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::counter,
+                instantiated: Module {
+                    name: counter,
+                    ..
+                },
+            }.count,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::counter,
@@ -192,205 +209,33 @@ Simulation {
                     name: counter,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: SyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::cd.rst",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: SyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::counter,
                 instantiated: Module {
                     name: counter,
                     ..
                 },
-        }.count: CompiledValue {
+            }.count,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(counter: counter).counter::count",
-                                ty: UInt<4>,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "counter",
         children: [

crates/fayalite/tests/sim/expected/duplicate_names.txt

@@ -88,10 +88,14 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [],
+        uninitialized_ios: {},
         io_targets: {},
-    made_initial_step: true,
+        did_initial_settle: true,
-    needs_settle: false,
+    },
+    extern_modules: [],
+    state_ready_to_run: false,
     trace_decls: TraceModule {
         name: "duplicate_names",
         children: [

crates/fayalite/tests/sim/expected/enums.txt

@@ -1215,7 +1215,59 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.en,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.which_in,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.data_in,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.which_out,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.data_out,
+            Instance {
+                name: <simulator>::enums,
+                instantiated: Module {
+                    name: enums,
+                    ..
+                },
+            }.b_out,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::enums,
@@ -1223,381 +1275,68 @@ Simulation {
                     name: enums,
                     ..
                 },
-        }.b_out: CompiledValue {
+            }.b_out,
-            layout: CompiledTypeLayout {
-                ty: Enum {
-                    HdlNone,
-                    HdlSome(Bundle {0: UInt<1>, 1: Bool}),
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::b_out",
-                                ty: Enum {
-                                    HdlNone,
-                                    HdlSome(Bundle {0: UInt<1>, 1: Bool}),
-                                },
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 7, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: SyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::cd.rst",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: SyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.data_in: CompiledValue {
+            }.data_in,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::data_in",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 4, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.data_out: CompiledValue {
+            }.data_out,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::data_out",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 6, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.en: CompiledValue {
+            }.en,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::en",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.which_in: CompiledValue {
+            }.which_in,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::which_in",
-                                ty: UInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::enums,
                 instantiated: Module {
                     name: enums,
                     ..
                 },
-        }.which_out: CompiledValue {
+            }.which_out,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(enums: enums).enums::which_out",
-                                ty: UInt<2>,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 5, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "enums",
         children: [

crates/fayalite/tests/sim/expected/extern_module.txt

@@ -0,0 +1,224 @@
+Simulation {
+    state: State {
+        insns: Insns {
+            state_layout: StateLayout {
+                ty: TypeLayout {
+                    small_slots: StatePartLayout<SmallSlots> {
+                        len: 0,
+                        debug_data: [],
+                        ..
+                    },
+                    big_slots: StatePartLayout<BigSlots> {
+                        len: 2,
+                        debug_data: [
+                            SlotDebugData {
+                                name: "InstantiatedModule(extern_module: extern_module).extern_module::i",
+                                ty: Bool,
+                            },
+                            SlotDebugData {
+                                name: "InstantiatedModule(extern_module: extern_module).extern_module::o",
+                                ty: Bool,
+                            },
+                        ],
+                        ..
+                    },
+                },
+                memories: StatePartLayout<Memories> {
+                    len: 0,
+                    debug_data: [],
+                    layout_data: [],
+                    ..
+                },
+            },
+            insns: [
+                // at: module-XXXXXXXXXX.rs:1:1
+                0: Return,
+            ],
+            ..
+        },
+        pc: 0,
+        memory_write_log: [],
+        memories: StatePart {
+            value: [],
+        },
+        small_slots: StatePart {
+            value: [],
+        },
+        big_slots: StatePart {
+            value: [
+                1,
+                1,
+            ],
+        },
+    },
+    io: Instance {
+        name: <simulator>::extern_module,
+        instantiated: Module {
+            name: extern_module,
+            ..
+        },
+    },
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::extern_module,
+                instantiated: Module {
+                    name: extern_module,
+                    ..
+                },
+            }.i,
+            Instance {
+                name: <simulator>::extern_module,
+                instantiated: Module {
+                    name: extern_module,
+                    ..
+                },
+            }.o,
+        ],
+        uninitialized_ios: {},
+        io_targets: {
+            Instance {
+                name: <simulator>::extern_module,
+                instantiated: Module {
+                    name: extern_module,
+                    ..
+                },
+            }.i,
+            Instance {
+                name: <simulator>::extern_module,
+                instantiated: Module {
+                    name: extern_module,
+                    ..
+                },
+            }.o,
+        },
+        did_initial_settle: true,
+    },
+    extern_modules: [
+        SimulationExternModuleState {
+            module_state: SimulationModuleState {
+                base_targets: [
+                    ModuleIO {
+                        name: extern_module::i,
+                        is_input: true,
+                        ty: Bool,
+                        ..
+                    },
+                    ModuleIO {
+                        name: extern_module::o,
+                        is_input: false,
+                        ty: Bool,
+                        ..
+                    },
+                ],
+                uninitialized_ios: {},
+                io_targets: {
+                    ModuleIO {
+                        name: extern_module::i,
+                        is_input: true,
+                        ty: Bool,
+                        ..
+                    },
+                    ModuleIO {
+                        name: extern_module::o,
+                        is_input: false,
+                        ty: Bool,
+                        ..
+                    },
+                },
+                did_initial_settle: true,
+            },
+            io_ty: Bundle {
+                #[hdl(flip)] /* offset = 0 */
+                i: Bool,
+                /* offset = 1 */
+                o: Bool,
+            },
+            sim: ExternModuleSimulation {
+                generator: Sim {
+                    i: ModuleIO {
+                        name: extern_module::i,
+                        is_input: true,
+                        ty: Bool,
+                        ..
+                    },
+                    o: ModuleIO {
+                        name: extern_module::o,
+                        is_input: false,
+                        ty: Bool,
+                        ..
+                    },
+                },
+                source_location: SourceLocation(
+                    module-XXXXXXXXXX.rs:4:1,
+                ),
+                _phantom: PhantomData<fayalite::bundle::Bundle>,
+            },
+            running_generator: Some(
+                ...,
+            ),
+            wait_target: Some(
+                Instant(
+                    20.500000000000 μs,
+                ),
+            ),
+        },
+    ],
+    state_ready_to_run: false,
+    trace_decls: TraceModule {
+        name: "extern_module",
+        children: [
+            TraceModuleIO {
+                name: "i",
+                child: TraceBool {
+                    location: TraceScalarId(0),
+                    name: "i",
+                    flow: Source,
+                },
+                ty: Bool,
+                flow: Source,
+            },
+            TraceModuleIO {
+                name: "o",
+                child: TraceBool {
+                    location: TraceScalarId(1),
+                    name: "o",
+                    flow: Sink,
+                },
+                ty: Bool,
+                flow: Sink,
+            },
+        ],
+    },
+    traces: [
+        SimTrace {
+            id: TraceScalarId(0),
+            kind: BigBool {
+                index: StatePartIndex<BigSlots>(0),
+            },
+            state: 0x1,
+            last_state: 0x1,
+        },
+        SimTrace {
+            id: TraceScalarId(1),
+            kind: BigBool {
+                index: StatePartIndex<BigSlots>(1),
+            },
+            state: 0x1,
+            last_state: 0x1,
+        },
+    ],
+    trace_memories: {},
+    trace_writers: [
+        Running(
+            VcdWriter {
+                finished_init: true,
+                timescale: 1 ps,
+                ..
+            },
+        ),
+    ],
+    instant: 20 μs,
+    clocks_triggered: [],
+    ..
+}

crates/fayalite/tests/sim/expected/extern_module.vcd

@@ -0,0 +1,51 @@
+$timescale 1 ps $end
+$scope module extern_module $end
+$var wire 1 ! i $end
+$var wire 1 " o $end
+$upscope $end
+$enddefinitions $end
+$dumpvars
+0!
+1"
+$end
+#500000
+#1500000
+0"
+#2500000
+1"
+#3500000
+0"
+#4500000
+1"
+#5500000
+0"
+#6500000
+1"
+#7500000
+0"
+#8500000
+1"
+#9500000
+0"
+#10000000
+1!
+#10500000
+#11500000
+1"
+#12500000
+0"
+#13500000
+1"
+#14500000
+0"
+#15500000
+1"
+#16500000
+0"
+#17500000
+1"
+#18500000
+0"
+#19500000
+1"
+#20000000

crates/fayalite/tests/sim/expected/memories2.txt

@@ -598,7 +598,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::memories2,
+                instantiated: Module {
+                    name: memories2,
+                    ..
+                },
+            }.rw,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::memories2,
@@ -606,506 +616,61 @@ Simulation {
                     name: memories2,
                     ..
                 },
-        }.rw: CompiledValue {
+            }.rw,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    addr: UInt<3>,
-                    /* offset = 3 */
-                    en: Bool,
-                    /* offset = 4 */
-                    clk: Clock,
-                    #[hdl(flip)] /* offset = 5 */
-                    rdata: UInt<2>,
-                    /* offset = 7 */
-                    wmode: Bool,
-                    /* offset = 8 */
-                    wdata: UInt<2>,
-                    /* offset = 10 */
-                    wmask: Bool,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 7,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.addr",
-                                ty: UInt<3>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.en",
-                                ty: Bool,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.rdata",
-                                ty: UInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.wmode",
-                                ty: Bool,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.wdata",
-                                ty: UInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(memories2: memories2).memories2::rw.wmask",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<3>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<3>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Bool,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Bool,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(2),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(3),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(4),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Bool,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Bool,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(5),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(6),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Bool,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Bool,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 7 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.addr: CompiledValue {
+            }.rw.addr,
-            layout: CompiledTypeLayout {
-                ty: UInt<3>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<3>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.clk: CompiledValue {
+            }.rw.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.en: CompiledValue {
+            }.rw.en,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.rdata: CompiledValue {
+            }.rw.rdata,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.wdata: CompiledValue {
+            }.rw.wdata,
-            layout: CompiledTypeLayout {
-                ty: UInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 5, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.wmask: CompiledValue {
+            }.rw.wmask,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 6, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::memories2,
                 instantiated: Module {
                     name: memories2,
                     ..
                 },
-        }.rw.wmode: CompiledValue {
+            }.rw.wmode,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Bool,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 4, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "memories2",
         children: [

crates/fayalite/tests/sim/expected/mod1.txt

@@ -216,7 +216,17 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::mod1,
+                instantiated: Module {
+                    name: mod1,
+                    ..
+                },
+            }.o,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::mod1,
@@ -224,305 +234,40 @@ Simulation {
                     name: mod1,
                     ..
                 },
-        }.o: CompiledValue {
+            }.o,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    #[hdl(flip)] /* offset = 0 */
-                    i: UInt<4>,
-                    /* offset = 4 */
-                    o: SInt<2>,
-                    #[hdl(flip)] /* offset = 6 */
-                    i2: SInt<2>,
-                    /* offset = 8 */
-                    o2: UInt<4>,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 4,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.i",
-                                ty: UInt<4>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.o",
-                                ty: SInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.i2",
-                                ty: SInt<2>,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(mod1: mod1).mod1::o.o2",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<4>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<4>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(2),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SInt<2>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SInt<2>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(3),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: UInt<4>,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: UInt<4>,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 4 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.i: CompiledValue {
+            }.o.i,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<4>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.i2: CompiledValue {
+            }.o.i2,
-            layout: CompiledTypeLayout {
-                ty: SInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.o: CompiledValue {
+            }.o.o,
-            layout: CompiledTypeLayout {
-                ty: SInt<2>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SInt<2>,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::mod1,
                 instantiated: Module {
                     name: mod1,
                     ..
                 },
-        }.o.o2: CompiledValue {
+            }.o.o2,
-            layout: CompiledTypeLayout {
-                ty: UInt<4>,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: UInt<4>,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "mod1",
         children: [

crates/fayalite/tests/sim/expected/shift_register.txt

@@ -265,7 +265,31 @@ Simulation {
             ..
         },
     },
-    uninitialized_inputs: {},
+    main_module: SimulationModuleState {
+        base_targets: [
+            Instance {
+                name: <simulator>::shift_register,
+                instantiated: Module {
+                    name: shift_register,
+                    ..
+                },
+            }.cd,
+            Instance {
+                name: <simulator>::shift_register,
+                instantiated: Module {
+                    name: shift_register,
+                    ..
+                },
+            }.d,
+            Instance {
+                name: <simulator>::shift_register,
+                instantiated: Module {
+                    name: shift_register,
+                    ..
+                },
+            }.q,
+        ],
+        uninitialized_ios: {},
         io_targets: {
             Instance {
                 name: <simulator>::shift_register,
@@ -273,239 +297,40 @@ Simulation {
                     name: shift_register,
                     ..
                 },
-        }.cd: CompiledValue {
+            }.cd,
-            layout: CompiledTypeLayout {
-                ty: Bundle {
-                    /* offset = 0 */
-                    clk: Clock,
-                    /* offset = 1 */
-                    rst: SyncReset,
-                },
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 2,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::cd.clk",
-                                ty: Clock,
-                            },
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::cd.rst",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Bundle {
-                    fields: [
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(0),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: Clock,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: Clock,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                        CompiledBundleField {
-                            offset: TypeIndex {
-                                small_slots: StatePartIndex<SmallSlots>(0),
-                                big_slots: StatePartIndex<BigSlots>(1),
-                            },
-                            ty: CompiledTypeLayout {
-                                ty: SyncReset,
-                                layout: TypeLayout {
-                                    small_slots: StatePartLayout<SmallSlots> {
-                                        len: 0,
-                                        debug_data: [],
-                                        ..
-                                    },
-                                    big_slots: StatePartLayout<BigSlots> {
-                                        len: 1,
-                                        debug_data: [
-                                            SlotDebugData {
-                                                name: "",
-                                                ty: SyncReset,
-                                            },
-                                        ],
-                                        ..
-                                    },
-                                },
-                                body: Scalar,
-                            },
-                        },
-                    ],
-                },
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 2 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.cd.clk: CompiledValue {
+            }.cd.clk,
-            layout: CompiledTypeLayout {
-                ty: Clock,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: Clock,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.cd.rst: CompiledValue {
+            }.cd.rst,
-            layout: CompiledTypeLayout {
-                ty: SyncReset,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "",
-                                ty: SyncReset,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.d: CompiledValue {
+            }.d,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
-                    },
-                    big_slots: StatePartLayout<BigSlots> {
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::d",
-                                ty: Bool,
-                            },
-                        ],
-                        ..
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
-            },
-            write: None,
-        },
             Instance {
                 name: <simulator>::shift_register,
                 instantiated: Module {
                     name: shift_register,
                     ..
                 },
-        }.q: CompiledValue {
+            }.q,
-            layout: CompiledTypeLayout {
-                ty: Bool,
-                layout: TypeLayout {
-                    small_slots: StatePartLayout<SmallSlots> {
-                        len: 0,
-                        debug_data: [],
-                        ..
         },
-                    big_slots: StatePartLayout<BigSlots> {
+        did_initial_settle: true,
-                        len: 1,
-                        debug_data: [
-                            SlotDebugData {
-                                name: "InstantiatedModule(shift_register: shift_register).shift_register::q",
-                                ty: Bool,
     },
-                        ],
+    extern_modules: [],
-                        ..
+    state_ready_to_run: false,
-                    },
-                },
-                body: Scalar,
-            },
-            range: TypeIndexRange {
-                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
-                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
-            },
-            write: None,
-        },
-    },
-    made_initial_step: true,
-    needs_settle: false,
     trace_decls: TraceModule {
         name: "shift_register",
         children: [

crates/fayalite/visit_types.json

@@ -160,7 +160,8 @@
             "data": {
                 "$kind": "Struct",
                 "verilog_name": "Visible",
-                "parameters": "Visible"
+                "parameters": "Visible",
+                "simulation": "Visible"
             }
         },
         "ExternModuleParameter": {
@@ -1269,6 +1270,12 @@
                 "$kind": "Opaque"
             },
             "generics": "<T: ?Sized + crate::phantom_const::PhantomConstValue>"
+        },
+        "ExternModuleSimulation": {
+            "data": {
+                "$kind": "Opaque"
+            },
+            "generics": "<T: BundleType>"
         }
     }
 }