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simplify SimValue Debug format, making complex structures much easier to read
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This commit is contained in:
Jacob Lifshay 2025-12-14 20:41:16 -08:00
parent fbe4585578
commit c97b44d9d6
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
11 changed files with 97 additions and 197 deletions
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6
crates/fayalite/src/sim/value.rs
View file

@ -358,11 +358,7 @@ impl<T: Type> DerefMut for SimValue<T> {
impl<T: Type> fmt::Debug for SimValue<T> {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
let inner = self.inner.share();
f.debug_struct("SimValue")
.field("ty", &inner.ty)
.field("value", &inner.value)
.finish()
T::SimValue::fmt(&**self, f)
}
}

18
crates/fayalite/tests/sim/expected/extern_module2.txt
View file

@ -354,12 +354,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -404,12 +401,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
{
SensitivitySet {

54
crates/fayalite/tests/sim/expected/ripple_counter.txt
View file

@ -1505,12 +1505,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -1555,12 +1552,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -1605,12 +1599,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -1655,12 +1646,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {
@ -1704,12 +1692,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {
@ -1753,12 +1738,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {

18
crates/fayalite/tests/sim/expected/sim_fork_join.txt
View file

@ -456,12 +456,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -506,12 +503,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {

18
crates/fayalite/tests/sim/expected/sim_fork_join_scope.txt
View file

@ -456,12 +456,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -506,12 +503,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {

36
crates/fayalite/tests/sim/expected/sim_only_connects.txt
View file

@ -1583,12 +1583,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 6, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -1633,12 +1630,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 13, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -1683,12 +1677,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
{
SensitivitySet {
@ -1732,12 +1723,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x1_u1,
sim_only_values: [],
},
{
SensitivitySet {

18
crates/fayalite/tests/sim/expected/sim_read_past.txt
View file

@ -9655,12 +9655,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -9705,12 +9702,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {

36
crates/fayalite/tests/sim/expected/sim_resettable_counter_async.txt
View file

@ -384,12 +384,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: AsyncReset,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -434,12 +431,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -484,12 +478,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: AsyncReset,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {
@ -533,12 +524,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {

36
crates/fayalite/tests/sim/expected/sim_resettable_counter_async_immediate_reset.txt
View file

@ -384,12 +384,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: AsyncReset,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -434,12 +431,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -484,12 +478,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: AsyncReset,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {
@ -533,12 +524,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {

27
crates/fayalite/tests/sim/expected/sim_resettable_counter_sync.txt
View file

@ -384,12 +384,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -434,12 +431,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -484,12 +478,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {

27
crates/fayalite/tests/sim/expected/sim_resettable_counter_sync_immediate_reset.txt
View file

@ -384,12 +384,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -434,12 +431,9 @@ Simulation {
sim_only_slots: StatePartIndexRange<SimOnlySlots> { start: 0, len: 0 },
},
write: None,
}: SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
}: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
},
changed: Cell {
@ -484,12 +478,9 @@ Simulation {
},
write: None,
}: (
SimValue {
ty: Clock,
value: OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
OpaqueSimValue {
bits: 0x0_u1,
sim_only_values: [],
},
{
SensitivitySet {