programmerjake
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  • Joined on 2024-07-08
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programmerjake pushed to adding-simulator at libre-chip/fayalite 2024-11-07 09:19:41 +00:00
56ff69ba52 WIP adding simulator
programmerjake pushed to master at libre-chip/cpu 2024-11-06 01:39:57 +00:00
b51109f4f6 WIP implementing reg_alloc
1a72425156 update fayalite dependency
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programmerjake pushed to master at libre-chip/cpu 2024-10-31 03:58:02 +00:00
265b5a9cec add repository to cache key
programmerjake pushed to master at libre-chip/fayalite 2024-10-31 03:55:19 +00:00
3d5d8c54b6 add repository to cache key
programmerjake pushed to master at libre-chip/fayalite 2024-10-31 03:47:39 +00:00
ee15fd2b94 support #[hdl] type aliases
20cf0abbcc fix using #[hdl] types like S<{ 1 + 2 }>
5bd0de48b7 change to version 0.2.1
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programmerjake pushed to master at libre-chip/parse_powerisa_pdf 2024-10-28 07:40:10 +00:00
87352a4fd7 add instructions to the readme
25f47227d8 generate xml output
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programmerjake pushed to master at libre-chip/parse_powerisa_pdf 2024-10-28 05:59:55 +00:00
21b97c0064 WIP -- no reported errors till page 305
programmerjake pushed to master at libre-chip/parse_powerisa_pdf 2024-10-27 08:54:36 +00:00
0da4efc597 WIP
programmerjake created branch master in libre-chip/parse_powerisa_pdf 2024-10-26 00:49:20 +00:00
programmerjake pushed to master at libre-chip/parse_powerisa_pdf 2024-10-26 00:49:20 +00:00
7ddc818c6a add readme
b9f47e5ae1 WIP... all fonts included
08141ce560 parse instruction bit fields
77b0ce2c3d initial commit
programmerjake created repository libre-chip/parse_powerisa_pdf 2024-10-26 00:48:47 +00:00
programmerjake pushed tag v0.2.0 to libre-chip/fayalite 2024-10-18 05:20:01 +00:00
programmerjake pushed to master at libre-chip/fayalite 2024-10-18 04:32:45 +00:00
0c9c48a066 split out deps into separate workflow with better caching using deps.yml from cpu.git
programmerjake pushed to master at libre-chip/cpu 2024-10-17 01:45:49 +00:00
4c94f5d91a split deps out into separate job with cache and build z3 4.13.3
programmerjake pushed to master at libre-chip/cpu 2024-10-16 06:52:18 +00:00
e5f59939cc remove now-unnecessary memory-based parallelism limiting
a305ad51b2 reduce formal proof depth to avoid z3 eating all our memory
b54e40561f limit parallelism based on available memory too
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programmerjake pushed to master at libre-chip/fayalite 2024-10-16 04:33:22 +00:00
cb17913004 limit sby to one thread each since it seems not to respect job count in parallel mode
programmerjake pushed to master at libre-chip/fayalite 2024-10-16 03:33:08 +00:00
42effd1132 switch to using a make job server for managing test parallelism
programmerjake pushed to master at libre-chip/cpu 2024-10-15 09:40:40 +00:00
aaa2cb193e add formal proof for unit_free_regs_tracker
programmerjake pushed to master at libre-chip/fayalite 2024-10-15 08:50:21 +00:00
3d0f95cfe5 formal: add workaround for wires disappearing because yosys optimizes them out
programmerjake pushed to master at libre-chip/cpu 2024-10-15 04:21:04 +00:00
cb5855589f WIP adding register allocator