programmerjake

programmerjake pushed to master at libre-chip/fayalite

2026-05-14 02:48:19 +00:00

ea183eac87 add TraceAsString<T> -- sim traces it as a string rather than all its internal fields

programmerjake deleted branch add-trace-as-string from programmerjake/fayalite

2026-05-14 02:48:19 +00:00

programmerjake automatically merged pull request libre-chip/fayalite#74

2026-05-14 02:48:17 +00:00

programmerjake pushed to add-trace-as-string at programmerjake/fayalite

2026-05-14 02:43:58 +00:00

ea183eac87 add TraceAsString<T> -- sim traces it as a string rather than all its internal fields

programmerjake pushed to add-trace-as-string at programmerjake/fayalite

2026-05-14 02:41:14 +00:00

299cbfa348 add TraceAsString<T> -- sim traces it as a string rather than all its internal fields

programmerjake created pull request libre-chip/fayalite#74

2026-05-14 02:35:23 +00:00

add TraceAsString<T> -- sim traces it as a string rather than all its internal fields

programmerjake deleted branch add-trace-as-debug from programmerjake/fayalite

2026-05-14 02:34:31 +00:00

programmerjake created branch add-trace-as-string in programmerjake/fayalite

2026-05-14 02:34:31 +00:00

programmerjake pushed to add-trace-as-string at programmerjake/fayalite

2026-05-14 02:34:31 +00:00

36c348e01c add TraceAsString<T> -- sim traces it as a string rather than all its internal fields

26224abe1c sim: properly update all VCD wires when they share simulation state

2266315944 redo #[hdl(sim)] match/let destructuring to support matching values of type Type::SimValue

7e9d7739fb use #[hdl(cmp_eq)] for HdlOption and implement conversion <-> Option

7516ec3c24 implement #[hdl(cmp_eq)] for enums

Compare 10 commits »

programmerjake pushed to add-trace-as-debug at programmerjake/fayalite

2026-05-13 07:59:11 +00:00

ea062b9428 WIP adding TraceAsString

programmerjake created branch add-trace-as-debug in programmerjake/fayalite

2026-05-12 05:45:17 +00:00

programmerjake pushed to add-trace-as-debug at programmerjake/fayalite

2026-05-12 05:45:17 +00:00

27f3733573 WIP adding TraceAsString

26224abe1c sim: properly update all VCD wires when they share simulation state

2266315944 redo #[hdl(sim)] match/let destructuring to support matching values of type Type::SimValue

7e9d7739fb use #[hdl(cmp_eq)] for HdlOption and implement conversion <-> Option

7516ec3c24 implement #[hdl(cmp_eq)] for enums

Compare 10 commits »

programmerjake pushed to rename-execute-retire at programmerjake/cpu

2026-05-11 06:39:44 +00:00

3fbdab0862 rename_execute_retire: implement generating L2 reg file writes

programmerjake pushed to rename-execute-retire at programmerjake/cpu

2026-05-09 03:24:05 +00:00

04e924460a WIP adding new test for L2 reg file store

programmerjake pushed to rename-execute-retire at programmerjake/cpu

2026-05-08 04:44:45 +00:00

3300e7ca01 WIP adding new test for L2 reg file store

33b5d59507 improve debug formatting of PRegValue and PRegFlags

559e2967a2 improve debug formatting of MOpRegNum/MOpDestReg

5e6041a97c change MOp to use SrcReg: Type instead of UIntType<SrcRegWidth>

Compare 4 commits »

programmerjake pushed to rename-execute-retire at programmerjake/cpu

2026-05-07 03:12:27 +00:00

fca2ff8c91 WIP adding new test for L2 reg file store

programmerjake pushed to rename-execute-retire at programmerjake/cpu

2026-05-06 04:52:41 +00:00

409ca7bf97 update decode_one_insn.vcd for modified instruction data structures

programmerjake pushed to rename-execute-retire at programmerjake/cpu

2026-05-06 04:29:09 +00:00

9308e5d195 update fayalite to fix bug in VCD generation

programmerjake pushed to master at libre-chip/fayalite

2026-05-06 04:22:22 +00:00

26224abe1c sim: properly update all VCD wires when they share simulation state

programmerjake deleted branch fix-sim-for-vcd-wires-sharing-sim-state from programmerjake/fayalite

2026-05-06 04:22:22 +00:00