3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-03-26 06:18:42 +00:00
yosys/techlibs
2026-02-27 13:12:32 +01:00
..
achronix
anlogic
common Move Design::sort() calls out of opt and opt_clean passes into the synth passes that need them. 2026-01-23 01:14:35 +00:00
coolrunner2
easic
efinix
fabulous
gatemate Makefile: Add gatemate genfiles 2025-11-04 11:46:27 +13:00
gowin gowin: remove spurious warning 2026-02-27 13:12:32 +01:00
greenpak4
ice40 add ID::src to allowlist instead 2025-12-17 01:31:32 -08:00
intel
intel_alm
lattice Add and use fix_mod.py 2026-01-28 07:45:58 +13:00
microchip microchip: fix IdString memory leak 2025-11-13 14:10:52 +01:00
nanoxplore
quicklogic Remove .c_str() from parameters to log_debug() 2025-09-23 19:10:33 +12:00
sf2
xilinx Merge pull request #3459 from gs-jgj/feature_dsp48e1_presub 2026-02-11 08:02:18 -08:00
.gitignore
fix_mod.py Add and use fix_mod.py 2026-01-28 07:45:58 +13:00