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yosys/techlibs/xilinx
Gus Smith e3db8fee6f
Merge pull request #3459 from gs-jgj/feature_dsp48e1_presub
Add support for subtract in preadder
2026-02-11 08:02:18 -08:00
..
tests Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files. 2025-07-22 10:38:38 +00:00
abc9_model.v
arith_map.v
brams_defs.vh xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
brams_xc2v.txt
brams_xc2v_map.v xilinx: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
brams_xc3sda.txt
brams_xc3sda_map.v
brams_xc4v.txt
brams_xc4v_map.v
brams_xc5v_map.v
brams_xc6v_map.v
brams_xcu_map.v
brams_xcv.txt
brams_xcv_map.v
cells_map.v
cells_sim.v
cells_xtra.py
cells_xtra.v Add and use fix_mod.py 2026-01-28 07:45:58 +13:00
ff_map.v
lut_map.v
lutrams_xc5v.txt
lutrams_xc5v_map.v
lutrams_xcu.txt
lutrams_xcv.txt
lutrams_xcv_map.v
Makefile.inc
mux_map.v
synth_xilinx.cc Move Design::sort() calls out of opt and opt_clean passes into the synth passes that need them. 2026-01-23 01:14:35 +00:00
urams.txt
urams_map.v
xc3s_mult_map.v
xc3sda_dsp_map.v
xc4v_dsp_map.v
xc5v_dsp_map.v
xc6s_dsp_map.v
xc7_dsp_map.v
xcu_dsp_map.v
xilinx_dffopt.cc Update techlibs to avoid bits() 2025-09-16 03:17:23 +00:00
xilinx_dsp.cc Add support for subtraction in preadder 2026-02-03 08:31:01 -08:00
xilinx_dsp.pmg Add support for subtraction in preadder 2026-02-03 08:31:01 -08:00
xilinx_dsp48a.pmg
xilinx_dsp_cascade.pmg xilinx: fix IdString memory leak 2025-11-13 14:10:52 +01:00
xilinx_dsp_CREG.pmg
xilinx_srl.cc Update techlibs to avoid bits() 2025-09-16 03:17:23 +00:00
xilinx_srl.pmg