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yosys/kernel
2026-03-04 12:39:45 +01:00
..
binding.cc
binding.h
bitpattern.h
calc.cc Fix segfault from shift with 0-width signed arg. 2026-02-12 22:03:42 -06:00
cellaigs.cc
cellaigs.h
celledges.cc kernel/celledges: cover more cell types 2026-02-09 14:13:40 +01:00
celledges.h
celltypes.h celltypes: fix absurd eval declarations 2026-03-04 12:39:45 +01:00
compute_graph.h
consteval.h consteval: use newcelltypes 2026-03-04 12:22:14 +01:00
constids.inc
cost.cc
cost.h
driver.cc
drivertools.cc
drivertools.h drivertools: use newcelltypes 2026-03-04 12:22:14 +01:00
ff.cc
ff.h
ffinit.h
ffmerge.cc
ffmerge.h
fmt.cc
fmt.h
fstdata.cc
fstdata.h
functional.cc
functional.h
gzip.cc
gzip.h
hashlib.h Parallelize opt_merge. 2026-01-08 04:21:39 +00:00
io.cc
io.h
json.cc
json.h
log.cc Use digit separators for large decimal integers 2026-01-13 16:38:12 +01:00
log.h
log_compat.cc
log_help.cc log_help: Don't reformat codeblocks 2026-01-28 08:07:44 +13:00
log_help.h
macc.h
mem.cc
mem.h
modtools.h modtools: use newcelltypes 2026-03-04 12:22:14 +01:00
newcelltypes.h newcelltypes: use unordered_map 2026-03-04 12:39:45 +01:00
pattern.h OptDff more accurate ctrl/pattern desc. 2026-01-26 22:19:36 +01:00
qcsat.cc
qcsat.h
register.cc register: use newcelltypes 2026-03-04 12:39:45 +01:00
register.h
rtlil.cc rtlil use newcelltypes. 2026-03-04 12:39:45 +01:00
rtlil.h rtlil use newcelltypes. 2026-03-04 12:39:45 +01:00
rtlil_bufnorm.cc
satgen.cc satgen: move report_missing_model here from equiv.h 2026-02-16 17:01:09 +01:00
satgen.h Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors 2026-02-25 15:39:31 +01:00
scopeinfo.cc
scopeinfo.h
sexpr.cc
sexpr.h
sigtools.h
tclapi.cc
threading.cc
threading.h
timinginfo.h
topo_scc.h
utils.h
yosys.cc yosys: use newcelltypes for yosys_celltypes 2026-03-04 12:22:47 +01:00
yosys.h
yosys_common.h
yw.cc
yw.h