3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-02-02 15:26:19 +00:00

OptDff more accurate ctrl/pattern desc.

This commit is contained in:
nella 2026-01-26 22:19:36 +01:00
parent 5803461c24
commit 9367090763
2 changed files with 5 additions and 6 deletions

View file

@ -19,8 +19,12 @@ YOSYS_NAMESPACE_BEGIN
* Used for analyzing MUX tree control paths in DFF optimization.
*/
typedef std::map<RTLIL::SigBit, bool> pattern_t; // Control signal -> required vals
// Pattern matching for clock enable
// A pattern maps control signals to their required values for a MUX path
typedef std::map<RTLIL::SigBit, bool> pattern_t; // Set of control signals that must ALL match required vals
typedef std::set<pattern_t> patterns_t; // Alternative patterns (OR)
typedef std::pair<RTLIL::SigBit, bool> ctrl_t; // Control signal
typedef std::set<ctrl_t> ctrls_t; // Set of control signals that must ALL be active
/**
* Find if two patterns differ in exactly one variable.

View file

@ -56,11 +56,6 @@ struct OptDffWorker
dict<SigBit, int> bitusers; // Signal sink count
dict<SigBit, cell_int_t> bit2mux; // Signal bit to driving MUX
// Pattern matching for clock enable
typedef std::map<RTLIL::SigBit, bool> pattern_t;
typedef std::pair<RTLIL::SigBit, bool> ctrl_t; // Control signal
typedef std::set<ctrl_t> ctrls_t; // Control signals (AND)
std::vector<Cell *> dff_cells;
bool is_active(SigBit sig, bool pol) const {