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yosys/tests
Miodrag Milanovic b3e38daedb Cleanup
2026-03-25 09:49:44 +01:00
..
aiger Small fix 2026-03-23 09:31:55 +01:00
alumacc Use generic testing on few more places 2026-03-16 10:13:10 +01:00
arch Convert arch 2026-03-24 08:47:57 +01:00
asicworld Convert autotest script wrapper 2026-03-16 13:07:11 +01:00
bind Use generic testing on few more places 2026-03-16 10:13:10 +01:00
blif Make test simple 2026-03-20 16:16:58 +01:00
bram Convert bram tests 2026-03-20 16:32:46 +01:00
bugpoint Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
cxxrtl Converted cxxrtl 2026-03-24 07:43:30 +01:00
errors Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique, 2018-10-25 02:37:56 +03:00
fmt Fix some escaping with different approach 2026-03-25 09:41:39 +01:00
fsm Did share, opt_share and fsm 2026-03-20 12:47:15 +01:00
functional Cleanup 2026-03-25 09:49:44 +01:00
hana Convert autotest script wrapper 2026-03-16 13:07:11 +01:00
liberty Convert liberty 2026-03-24 07:53:06 +01:00
lut Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files. 2025-07-22 10:38:38 +00:00
memfile Convert memfile tests 2026-03-20 16:32:46 +01:00
memlib Consolidated memlib generate script 2026-03-20 16:32:46 +01:00
memories Convert memories tests 2026-03-18 08:46:58 +01:00
opt Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
opt_share Did share, opt_share and fsm 2026-03-20 12:47:15 +01:00
peepopt Converted some more 2026-03-18 09:54:33 +01:00
proc Converted some more 2026-03-18 09:54:33 +01:00
pyosys Remove todo. 2026-03-04 12:39:45 +01:00
realmath Convert realmath 2026-03-23 09:16:08 +01:00
rpc Converted rpc 2026-03-23 09:22:47 +01:00
rtlil Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
sat Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
sdc Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
select Converted some more 2026-03-18 09:54:33 +01:00
share Did share, opt_share and fsm 2026-03-20 12:47:15 +01:00
sim Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
simple Convert autotest script wrapper 2026-03-16 13:07:11 +01:00
simple_abc9 Convert autotest script wrapper 2026-03-16 13:07:11 +01:00
smv Remove references to ilang 2024-11-05 12:36:31 +13:00
sva tests/sva: Skip sva tests that use SBY until SBY is compatible again 2024-03-05 14:37:33 +01:00
svinterfaces Disable failing test for now 2026-03-24 12:32:09 +01:00
svtypes Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
techmap Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
tools Convert memories tests 2026-03-18 08:46:58 +01:00
unit rtlil use newcelltypes. 2026-03-04 12:39:45 +01:00
various Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
verific Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
verilog Convert gen-tests shell script to python 2026-03-13 08:38:05 +01:00
vloghtb tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
xprop Did share, opt_share and fsm 2026-03-20 12:47:15 +01:00
.gitignore Save results, and create summary and report 2026-03-13 09:51:15 +01:00
common.mk Correctly handle errors 2026-03-18 08:46:34 +01:00
gen_tests_makefile.py Fix some escaping with different approach 2026-03-25 09:41:39 +01:00
Makefile Disabled some in fmt for now 2026-03-24 12:54:40 +01:00
pass-fuzzing.md Add AFL++ Grammar-Generator grammar for RTLIL fuzzing, and instructions for how to use it. 2025-12-22 21:56:26 +00:00