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yosys/techlibs/efinix
2019-10-04 13:27:10 +02:00
..
arith_map.v
bram.txt
brams_map.v
cells_map.v Add missing latch mapping 2019-10-04 12:58:11 +02:00
cells_sim.v FF should be initialized to 0 2019-10-04 13:27:10 +02:00
efinix_fixcarry.cc
efinix_gbuf.cc
Makefile.inc Fix missing newline at end of file 2019-08-22 18:06:36 +02:00
synth_efinix.cc