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yosys/tests
Lofty 050483a6b2
Merge pull request #5698 from YosysHQ/lofty/analogdevices
synth_analogdevices: synthesis for Analog Devices EFLX FPGAs [sc-273]
2026-03-06 08:57:59 +00:00
..
aiger
alumacc
arch Add missing EOL 2026-03-06 09:10:55 +01:00
asicworld
bind
blif
bram
bugpoint
cxxrtl
errors
fmt
fsm
functional
hana
liberty
lut
memfile
memlib
memories
opt Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors 2026-02-25 15:39:31 +01:00
opt_share
peepopt
proc
pyosys Remove todo. 2026-03-04 12:39:45 +01:00
realmath
rpc
rtlil
sat
sdc
select
share
sim
simple
simple_abc9
smv
sva
svinterfaces
svtypes ast: Add support for array-to-array assignment 2026-03-04 21:34:40 -08:00
techmap abc9: preserve topological-loop asserts with targeted SCC fallback 2026-02-26 22:30:32 -08:00
tools
unit rtlil use newcelltypes. 2026-03-04 12:39:45 +01:00
various Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors 2026-02-25 15:39:31 +01:00
verific
verilog support automatic lifetime qualifier on procedural variables 2026-02-27 20:42:52 +03:00
vloghtb
xprop
.gitignore
common-env.sh
gen-tests-makefile.sh
pass-fuzzing.md