mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-05-25 08:24:04 +00:00
Code Activity
6271 commits 114 branches 54 tags 63 MiB
Commit graph

5 commits

Author SHA1 Message Date
Ben Widawsky
f950a7a75d intel_synth: Small code cleanup to remove if ladder 
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
 2019-07-18 17:06:12 +01:00
dh73
acee813a5c Fixed the -vout flag to -vqm in examples/intel directory 2017-11-14 22:55:48 -06:00
Clifford Wolf
b72a7e1104 Replace CRLF line endings with LF in de2i.qsf (quartus example) 2017-04-12 16:51:46 +02:00
Larry Doolittle
2021ddecb3 Squelch trailing whitespace 2017-04-12 15:11:09 +02:00
dh73
c27dcc1e47 Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs 2017-04-05 23:01:29 -05:00