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Code Activity
7994 commits 122 branches 59 tags 72 MiB
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1589 commits

Author SHA1 Message Date
Eddie Hung
988e6163ab Add _nowide variants of LUT libraries in -nowidelut flows 2019-06-26 10:23:29 -07:00
Eddie Hung
741ebba70a Merge branch 'xaig' of github.com:YosysHQ/yosys into xaig 2019-06-26 10:10:16 -07:00
Eddie Hung
799b18263f Merge branch 'koriakin/xc7nocarrymux' into xaig 2019-06-26 10:04:01 -07:00
Miodrag Milanovic
ea0b6258ab Simulation model verilog fix 2019-06-26 18:34:34 +02:00
Eddie Hung
4ce329aefd synth_ecp5 rename -nomux to -nowidelut, but preserve former 2019-06-26 09:33:48 -07:00
Eddie Hung
7389b043c0 Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into koriakin/xc7nocarrymux 2019-06-26 09:33:38 -07:00
Eddie Hung
177c26ca35 Rename -minmuxf to -widemux 2019-06-26 09:16:45 -07:00
Eddie Hung
184cfacfb5 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-26 09:15:28 -07:00
David Shah
0dd850e655 abc9: Add wire delays to synth_ice40 
Signed-off-by: David Shah <dave@ds0.me>
 2019-06-26 11:39:44 +01:00
whitequark
3d4102cfa4 Add more ECP5 Diamond flip-flops. 
This includes all I/O registers, and a few more regular FFs where it
was convenient.
 2019-06-26 01:57:29 +00:00
Eddie Hung
480a04cb3c Realistic delays for RAM32X1D too 2019-06-25 09:34:28 -07:00
Eddie Hung
6095357390 Add RAM32X1D box info 2019-06-25 09:34:19 -07:00
Eddie Hung
6f36ec8ecf Merge remote-tracking branch 'origin/master' into xaig 2019-06-25 09:33:11 -07:00
Eddie Hung
4238feed81 This optimisation doesn't seem to work... 2019-06-25 09:21:46 -07:00
Eddie Hung
158325956e Realistic delays for RAM32X1D too 2019-06-24 23:05:28 -07:00
Eddie Hung
3825068a75 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-24 23:04:25 -07:00
Eddie Hung
2f770b7400 Use LUT delays for dist RAM delays 2019-06-24 23:02:53 -07:00
Eddie Hung
e1ba25d79f Add RAM32X1D box info 2019-06-24 22:54:35 -07:00
Eddie Hung
1564eb8b54 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-24 22:48:49 -07:00
Eddie Hung
4fadb471a3 Re-enable dist RAM boxes for ECP5 2019-06-24 22:12:50 -07:00
Eddie Hung
a4a7e63d84 Revert "Re-enable dist RAM boxes for ECP5" 
This reverts commit ca0225fcfa.
 2019-06-24 22:10:28 -07:00
Eddie Hung
ca0225fcfa Re-enable dist RAM boxes for ECP5 2019-06-24 21:55:54 -07:00
Eddie Hung
152e682bd5 Add Xilinx dist RAM as comb boxes 2019-06-24 21:54:01 -07:00
Eddie Hung
f1675b88f6 Merge remote-tracking branch 'origin/eddie/ram32x1d' into xc7mux 2019-06-24 16:39:18 -07:00
Eddie Hung
efd04880db Add RAM32X1D support 2019-06-24 16:16:50 -07:00
Eddie Hung
c3df895bf4 Reduce MuxFx resources in mux techmapping 2019-06-24 15:16:44 -07:00
Eddie Hung
db6a0b72b2 Reduce number of decomposed muxes during techmap 2019-06-24 14:28:56 -07:00
Eddie Hung
2e7992efff Revert "Fix techmapping muxes some more" 
This reverts commit 0aae3b4f43.
 2019-06-24 14:15:31 -07:00
Eddie Hung
7fbfcf20d1 Move comment 2019-06-24 14:15:00 -07:00
Eddie Hung
0aae3b4f43 Fix techmapping muxes some more 2019-06-24 12:50:48 -07:00
Eddie Hung
2b4501503d Fix mux techmapping 2019-06-24 12:18:17 -07:00
Eddie Hung
aa1eeda567 Modify costs for muxcover 2019-06-24 11:51:55 -07:00
Eddie Hung
36e6da5396 Change synth_xilinx's -nomux to -minmuxf <int> 2019-06-24 10:04:01 -07:00
Eddie Hung
d54dceb547 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-22 19:44:17 -07:00
Eddie Hung
6027549464 Add comments to ecp5 box 2019-06-22 14:33:47 -07:00
Eddie Hung
792d0670c3 Add comment to xc7 box 2019-06-22 14:28:24 -07:00
Eddie Hung
63182ed57d Fix and cleanup ice40 boxes for carry in/out 2019-06-22 14:27:41 -07:00
Eddie Hung
7903ebe3e0 Carry in/out box ordering now move to end, not swap with end 2019-06-22 14:18:42 -07:00
Eddie Hung
65c022c257 Remove DFF and RAMD box info for now 2019-06-21 20:41:14 -07:00
Eddie Hung
bbf3ad90f5 Remove $_MUX4_ techmap rule 2019-06-21 18:12:33 -07:00
Eddie Hung
39e0e006d5 Fix wreduce call (!!!), tweak muxcover costs 2019-06-21 18:12:07 -07:00
Eddie Hung
6c2cb51996 Merge remote-tracking branch 'origin/xaig' into xc7mux 2019-06-21 17:44:21 -07:00
Eddie Hung
1abe93e48d Merge remote-tracking branch 'origin/master' into xaig 2019-06-21 17:43:29 -07:00
Eddie Hung
faa2d6fc1c Constrain wreduce only if wide mux 2019-06-21 17:12:34 -07:00
Eddie Hung
aeee9dcad7 Simplify and comment out mux_map.v 2019-06-21 17:06:30 -07:00
Eddie Hung
ed00823b41 synth_xilinx to now wreduce except $mux, remove extra peepopt 2019-06-21 16:56:56 -07:00
Eddie Hung
29aee0989f mux_map to no longer copy last value into 1'bx 2019-06-21 16:55:59 -07:00
Eddie Hung
8bce3fb329 Fix spacing 2019-06-21 16:55:34 -07:00
Eddie Hung
694d40719f Fix spacing again, A_forward -> A_backward 2019-06-21 16:47:07 -07:00
Eddie Hung
11886c874c Restore wreduce to synth_xilinx, after muxcover 2019-06-21 16:18:29 -07:00