mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-14 04:48:46 +00:00
Code Activity
11525 commits 97 branches 53 tags 41 MiB
Commit graph

1 commit

Author SHA1 Message Date
Marcin Kościelnicki 89adef352f xilinx: Add support for LUT RAM on LUT4-based devices. 
There are multiple other kinds of RAMs supported on these devices, but
RAM16X1D is the only dual-port one.

Fixes #1549
 2020-02-07 09:03:22 +01:00
Renamed from techlibs/xilinx/lutrams.txt (Browse further)