3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-15 21:38:45 +00:00
Commit graph

4 commits

Author SHA1 Message Date
Dan Ravensloft d5b3b3bc6f synth_intel: revert change to run_max10 2019-07-18 17:09:15 +01:00
Ben Widawsky f950a7a75d intel_synth: Small code cleanup to remove if ladder
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2019-07-18 17:06:12 +01:00
dh73 acee813a5c Fixed the -vout flag to -vqm in examples/intel directory 2017-11-14 22:55:48 -06:00
dh73 c27dcc1e47 Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs 2017-04-05 23:01:29 -05:00