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7614 commits 99 branches 53 tags 47 MiB
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4 commits

Author SHA1 Message Date
Eddie Hung
5b5756b91e Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py} 2019-09-30 12:52:43 +02:00
Marcin Kościelnicki
13fa873f11 Use extractinv for synth_xilinx -ise 2019-09-19 04:02:48 +02:00
Marcin Kościelnicki
09ac36da60 xilinx: Make blackbox library family-dependent. 
Fixes #1246.
 2019-09-15 13:37:24 +02:00
Marcin Kościelnicki
3c75a72feb move attributes to wires 2019-08-13 19:36:59 +00:00