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Code Activity
8323 commits 97 branches 53 tags 41 MiB
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250 commits

Author SHA1 Message Date
Eddie Hung c28bea0382 Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor 2020-01-02 15:57:35 -08:00
Eddie Hung ca42af56a4 Update doc 2020-01-02 12:41:57 -08:00
Eddie Hung 8e507bd807 abc9 -keepff -> -dff; refactor dff operations 2020-01-02 12:36:54 -08:00
Eddie Hung 6dc63e84ef Cleanup abc9, update doc for -keepff option 2020-01-01 08:34:57 -08:00
Eddie Hung c40b1aae42 Restore abc9 -keepff 2020-01-01 08:34:43 -08:00
Eddie Hung ac808c5e2a attributes.count() -> get_bool_attribute() 2020-01-01 08:33:32 -08:00
Eddie Hung 96db05aaef parse_xaiger to not take box_lookup 2019-12-31 17:06:03 -08:00
Eddie Hung cac7f5d82e Do not re-order carry chain ports, just precompute iteration order 2019-12-31 16:12:40 -08:00
Eddie Hung dacdc6cc94 Remove abc9 -clk option 2019-12-30 22:59:14 -08:00
Eddie Hung fad99c2ec7 Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor 2019-12-30 20:14:24 -08:00
Eddie Hung b42b64e8ed Move Pass::call() out of abc9_ops into abc9 2019-12-30 19:23:54 -08:00
Eddie Hung b50de28c04 Add abc9_ops -prep_holes 2019-12-30 18:00:49 -08:00
Eddie Hung 16c4ec7eda Add abc9_ops -prep_dff 2019-12-30 16:36:33 -08:00
Eddie Hung 88b9c8d46d Restore count_outputs, move process check to abc 2019-12-30 16:29:08 -08:00
Eddie Hung 7649ec72c9 Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactor 2019-12-30 16:20:58 -08:00
Eddie Hung 4c3f517425 Remove delay targets doc 2019-12-30 16:11:42 -08:00
Eddie Hung 0735572934 write_xaiger to use scratchpad for stats; cleanup abc9 2019-12-30 15:35:33 -08:00
Eddie Hung d7ada66497 Add "synth_xilinx -dff" option, cleanup abc9 2019-12-30 14:13:16 -08:00
Eddie Hung f348ffa44d abc9_techmap -> _map; called from abc9 script pass along with abc9_ops 2019-12-28 05:07:46 -08:00
Eddie Hung ec25394808 Rename abc9.cc -> abc9_techmap.cc 2019-12-28 03:16:28 -08:00
Eddie Hung 509070f82f Disable clock domain partitioning in Yosys pass, let ABC do it 2019-12-23 08:36:20 -08:00
Eddie Hung 1ea1e8e54f Merge remote-tracking branch 'origin/master' into xaig_dff 2019-12-20 13:56:13 -08:00
Eddie Hung 979bf36fb0 Split into $__ABC9_ASYNC[01], do not add cell->type to clkdomain_t 2019-12-19 11:23:41 -08:00
Eddie Hung 3b559de6e9 Interpret "abc9 -lut" as lut string only if [0-9:] 2019-12-18 12:21:12 -08:00
Eddie Hung c9c77a90b3 Remove &verify -s 2019-12-17 16:11:54 -08:00
Eddie Hung b1b99e421e Use pool<> instead of std::set<> to preserver ordering 2019-12-17 16:10:40 -08:00
Eddie Hung d9bf7061cd Put $__ABC9_{FF_,ASYNC} into same clock domain as abc9_flop 2019-12-16 16:49:48 -08:00
Eddie Hung a46a7e8a67 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-12-06 23:22:52 -08:00
Eddie Hung ab667d3d47 Call abc9 with "&write -n", and parse_xaiger() to cope 2019-12-06 16:35:57 -08:00
Eddie Hung fce527f4f7 Fix abc9 re-integration, remove abc9_control_wire, use cell->type as 
as part of clock domain for mergeability class
 2019-12-06 16:20:18 -08:00
Eddie Hung 01a3cc29ba abc9 to do clock partitioning again 2019-12-05 17:26:22 -08:00
Eddie Hung d66d06b91d Add assertion 2019-12-03 19:21:42 -08:00
Eddie Hung a181ff66d3 Add abc9_init wire, attach to abc9_flop cell 2019-12-03 18:47:09 -08:00
Eddie Hung 6398b7c17c Cleanup 2019-12-01 23:43:28 -08:00
David Shah e9ce4e658b abc9: Fix breaking of SCCs 
Signed-off-by: David Shah <dave@ds0.me>
 2019-12-01 20:44:56 +00:00
Eddie Hung 6831510f5b Fix debug 2019-11-25 12:59:34 -08:00
Eddie Hung 180cb39395 abc9 to contain time call 2019-11-25 12:35:57 -08:00
Eddie Hung f50b6422b0 abc9 to no longer to clock partitioning, operate on whole modules only 2019-11-25 12:35:38 -08:00
Eddie Hung bf1167bc64 Conditioning abc9 on POs not accurate due to cells 2019-11-23 10:26:55 -08:00
Eddie Hung c4ec42ac38 When expanding upwards, do not capture $__ABC9_{FF,ASYNC}_ 
Since they should be captured downwards from the owning flop
 2019-11-21 16:17:03 -08:00
Eddie Hung 729c6b93e8 endomain -> ctrldomain 2019-11-20 14:32:01 -08:00
Eddie Hung 2cb2116b4c Use "abc9_period" attribute for delay target 2019-10-07 15:03:44 -07:00
Eddie Hung 3879ca1398 Do not require changes to cells_sim.v; try and work out comb model 2019-10-05 22:55:18 -07:00
Eddie Hung a5ac33f230 Merge branch 'master' into eddie/abc_to_abc9 2019-10-04 17:53:20 -07:00
Eddie Hung f0cadb0de8 Fix from merge 2019-10-04 17:52:19 -07:00
Eddie Hung bbc0e06af3 Merge remote-tracking branch 'origin/master' into xaig_dff 2019-10-04 17:39:08 -07:00
Eddie Hung 0acc51c3d8 Add temporary abc9 -nomfs and use for synth_xilinx -abc9 2019-10-04 17:35:43 -07:00
Eddie Hung 7959e9d6b2 Fix merge issues 2019-10-04 17:21:14 -07:00
Eddie Hung 7a45cd5856 Merge remote-tracking branch 'origin/eddie/abc_to_abc9' into xaig_dff 2019-10-04 16:58:55 -07:00
Eddie Hung aae2b9fd9c Rename abc_* names/attributes to more precisely be abc9_* 2019-10-04 11:04:10 -07:00