yosys

mirrors/yosys

Fork 0

mirror of https://github.com/YosysHQ/yosys synced 2025-05-08 16:25:49 +00:00

Commit graph

Author	SHA1	Message	Date
Martin Povišer	030d639201	opt_mem, memory_*: Refuse to operate in presence of processes Processes can contain `MemWriteAction` entries which are invisible to most passes operating on memories but which will be lowered to write ports later on by `proc_memwr`. For that reason we can get corrupted RTLIL if we sequence the memory passes before `proc`. Address that by making the affected memory passes ignore modules with processes.	2024-02-23 12:27:53 +01:00
Marcelina Kościelnicka	e0736c1622	Add memory_narrow pass.	2021-05-25 03:04:13 +02:00

Author

SHA1

Message

Date

Martin Povišer

030d639201

opt_mem, memory_*: Refuse to operate in presence of processes

Processes can contain `MemWriteAction` entries which are invisible to
most passes operating on memories but which will be lowered to write
ports later on by `proc_memwr`. For that reason we can get corrupted
RTLIL if we sequence the memory passes before `proc`. Address that by
making the affected memory passes ignore modules with processes.

2024-02-23 12:27:53 +01:00

Marcelina Kościelnicka

e0736c1622

Add memory_narrow pass.

2021-05-25 03:04:13 +02:00

2 commits