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7899 commits 122 branches 59 tags 72 MiB
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Author SHA1 Message Date
Eddie Hung
e68507a716 Update macc test 2019-09-06 23:19:03 -07:00
Eddie Hung
de8adecd39 Merge branch 'master' of github.com:YosysHQ/yosys 2019-09-06 22:52:00 -07:00
Eddie Hung
173c7936c3 Add missing -assert to equiv_opt 2019-09-06 22:51:44 -07:00
Eddie Hung
97e1520b13 Missing equiv_opt -assert 2019-09-06 22:50:03 -07:00
Eddie Hung
e2c2d784c8 Make one check $shift(x)? only; change testcase to be 8b 2019-09-06 22:48:23 -07:00
Eddie Hung
51b559af2c Usee equiv_opt -assert 2019-09-06 22:48:04 -07:00
Eddie Hung
74a5c802f7 Pack CREG 2019-09-06 21:01:36 -07:00
Eddie Hung
6a9205280f Use unextend lambda 2019-09-06 18:40:11 -07:00
Eddie Hung
b69512a5b9 Fix ffP just like ffPmux 2019-09-06 15:51:21 -07:00
Eddie Hung
5344bfe637 Perform D replacement properly 2019-09-06 15:46:15 -07:00
Eddie Hung
74eac76699 Add support for DREG 2019-09-06 15:32:26 -07:00
Eddie Hung
ef56f8596f Fine tune nusers when postAdd 2019-09-06 15:11:41 -07:00
Eddie Hung
0d1d8b4d24 Fix macc and mul tests 2019-09-06 14:57:36 -07:00
Eddie Hung
8246062acf Fix enable polarity 2019-09-06 14:36:10 -07:00
Eddie Hung
2c32056990 Logging for ffAD 2019-09-06 14:10:12 -07:00
Eddie Hung
e926f2973e Add support for pre-adder and AD register 2019-09-06 14:06:57 -07:00
Eddie Hung
ef77162ce4 Document (* gentb_skip *) attr for test_autotb 2019-09-06 13:28:15 -07:00
Eddie Hung
da8fe83f7a Tidy up ice40_dsp some more 2019-09-06 12:16:40 -07:00
Eddie Hung
776d769941 Use more index patterns 2019-09-06 12:07:35 -07:00
Eddie Hung
a945f6c7ef Fix ffPmux to cope with offset 2019-09-06 11:58:56 -07:00
Eddie Hung
fbf1b74946 Simplify filter expressions 2019-09-06 11:39:20 -07:00
Eddie Hung
39a5d046ea Fix nusers condition in ffP 2019-09-06 11:38:19 -07:00
Eddie Hung
cdc1e1f5c2 Check adder is <= 48 bits before packing 2019-09-06 10:35:06 -07:00
Eddie Hung
91f68c4de2 Check nusers for M and P enable muxes 2019-09-06 09:59:35 -07:00
Eddie Hung
4fe24b20f9 More nusers() checks for A and B enable muxes 2019-09-06 09:47:32 -07:00
Pepijn de Vos
2fb20f184a Revert "add MUX support" 
It turns out that they make everything worse and they don't PnR.

This reverts commit 3eff2271d0.
 2019-09-06 11:28:17 +02:00
Pepijn de Vos
96efa63f16 fix BRAM width and init 2019-09-06 10:55:04 +02:00
Pepijn de Vos
1b9f7f49b5 add more DFF to sim lib 2019-09-06 09:01:07 +02:00
Eddie Hung
dc10559f31 Cleanup 2019-09-05 21:39:52 -07:00
Eddie Hung
174edbcb96 Sensitive to CEB CEM CEP polarity 2019-09-05 21:38:35 -07:00
Eddie Hung
53ca536d67 ffAmuxAB -> ffAenpol 2019-09-05 21:28:28 -07:00
Eddie Hung
5a2fc6fcb5 Refactor ice40_dsp 2019-09-05 18:06:59 -07:00
Eddie Hung
888ae1d05e Fix broken ice40_dsp 2019-09-05 17:58:19 -07:00
Eddie Hung
38e73a3788 Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dsp 2019-09-05 13:01:34 -07:00
Eddie Hung
e742478e1d Merge remote-tracking branch 'origin/master' into xc7dsp 2019-09-05 13:01:27 -07:00
Eddie Hung
a32b14a55f Do not check signedness of post-adder (assume taken care of by DSP) 2019-09-05 12:38:47 -07:00
Eddie Hung
903cd58acf
Merge pull request #1312 from YosysHQ/xaig_arrival 
Allow arrival times of sequential outputs to be specified to abc9
 2019-09-05 12:00:23 -07:00
Eddie Hung
7bd55f379c Use filter instead of index; support wide enable muxes 2019-09-05 11:55:14 -07:00
Eddie Hung
fe5a1324c9 Do not make ff[MP]mux semioptional, use sigmap 2019-09-05 11:46:38 -07:00
Eddie Hung
447a31e75d Add support for CEP 2019-09-05 11:00:27 -07:00
Eddie Hung
05282afc25 Add support for CEB, remove check on nusers 2019-09-05 10:46:33 -07:00
Pepijn de Vos
5168b6ffa4 WIP aditional DFF primitives 2019-09-05 19:12:47 +02:00
Eddie Hung
0166e02e78 Cleanup 2019-09-05 10:07:56 -07:00
Eddie Hung
aa462da395 Support CEA 2019-09-05 10:07:26 -07:00
Clifford Wolf
58ec1df4c2 Bump version 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-05 19:05:13 +02:00
Clifford Wolf
4b7202c9c2
Merge pull request #1350 from YosysHQ/clifford/fixsby59 
Properly construct $live and $fair cells from "if (...) assume/assert (s_eventually ...)"
 2019-09-05 18:14:28 +02:00
Clifford Wolf
82784c279d
Merge pull request #1330 from YosysHQ/clifford/fix1145 
Add flatten handling of pre-existing wires as created by interfaces
 2019-09-05 18:10:40 +02:00
Eddie Hung
ef0681ea4c simple/peepopt.v tests to various/peepopt.ys with equiv_opt & select 2019-09-05 08:43:22 -07:00
Pepijn de Vos
47374a495d support bram initialisation 2019-09-05 17:25:51 +02:00
Eddie Hung
11f623cbe0 Revert "abc9 followed by clean otherwise netlist could be invalid for sim" 
This reverts commit 6fe1ca633d.
 2019-09-05 08:25:09 -07:00