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6566 commits 122 branches 59 tags 72 MiB
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Author SHA1 Message Date
Eddie Hung
bb1a8a0190 Add test 2019-08-21 21:58:20 -07:00
Eddie Hung
d3a212ff91 opt_expr to trim A port of $shiftx if Y_WIDTH == 1 2019-08-21 21:53:55 -07:00
Clifford Wolf
7d8db1c053
Merge pull request #1314 from YosysHQ/eddie/fix_techmap 
techmap -max_iter to apply to each module individually
 2019-08-21 09:12:56 +02:00
Eddie Hung
076af2e617 Missing newline 2019-08-20 20:37:52 -07:00
Eddie Hung
9b9d759451 Fix copy-paste typo 2019-08-20 20:18:51 -07:00
Eddie Hung
fe61dcce8b Grammar 2019-08-20 20:05:51 -07:00
Eddie Hung
fce8dc7db2 Add test 2019-08-20 20:05:16 -07:00
Eddie Hung
193eae0c84 techmap -max_iter to apply to each module individually 2019-08-20 19:50:20 -07:00
Eddie Hung
33960dd3d8
Merge pull request #1209 from YosysHQ/eddie/synth_xilinx 
[WIP] synth xilinx renaming, as per #1184
 2019-08-20 12:55:26 -07:00
Eddie Hung
14c03861b6
Merge pull request #1304 from YosysHQ/eddie/abc9_refactor 
Refactor abc9 to use port attributes, not module attributes
 2019-08-20 11:59:31 -07:00
Eddie Hung
d9fe4cccbf Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx 2019-08-20 11:57:52 -07:00
Clifford Wolf
ba71e4f8f2
Merge pull request #1298 from YosysHQ/clifford/pmgen 
Improvements in pmgen
 2019-08-20 11:39:42 +02:00
Clifford Wolf
d0117d7d12
Merge branch 'master' into clifford/pmgen 2019-08-20 11:39:23 +02:00
Clifford Wolf
6ffb910d12 Add test case for real parameters 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-20 11:38:21 +02:00
Clifford Wolf
c25c1e742b
Merge pull request #1308 from jakobwenzel/real_params 
Handle real values when deriving ast modules
 2019-08-20 11:37:26 +02:00
whitequark
749ff864aa
Merge pull request #1309 from whitequark/proc_clean-fix-1268 
proc_clean: fix order of switch insertion
 2019-08-20 00:45:41 +00:00
Eddie Hung
3f4886e7a3 Fix typo 2019-08-19 10:42:00 -07:00
Eddie Hung
7e010834eb Fix typo 2019-08-19 10:41:18 -07:00
Eddie Hung
f42ba811b6 ID({A,B,Y}) -> ID::{A,B,Y} for opt_share.cc 2019-08-19 10:11:47 -07:00
Eddie Hung
29e4c8bd06 Clarify with 'only' 2019-08-19 10:00:53 -07:00
Eddie Hung
c36fca86f7 Update doc 2019-08-19 09:59:57 -07:00
Eddie Hung
d81a090d89 Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithro 2019-08-19 09:56:17 -07:00
whitequark
4a942ba7b9 proc_clean: fix order of switch insertion. 
Fixes #1268.
 2019-08-19 16:44:23 +00:00
Jakob Wenzel
24971fda87 handle real values when deriving ast modules 2019-08-19 14:17:36 +02:00
Clifford Wolf
4adcbecec5
Merge pull request #1306 from mmicko/gitignore_fix 
Ignore all generated headers for pmgen pass
 2019-08-19 13:09:12 +02:00
Clifford Wolf
21699e5840 Add *.sv to tests/simple_abc9/.gitignore 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-19 13:04:57 +02:00
Clifford Wolf
1e3dd0a2da Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgen 2019-08-19 13:04:06 +02:00
Clifford Wolf
3edb0abed8
Merge pull request #1305 from YosysHQ/clifford/testfast 
Speed up "make test" and related cleanups
 2019-08-19 12:58:09 +02:00
Eddie Hung
e34f2de55d Merge remote-tracking branch 'origin/master' into clifford/testfast 2019-08-18 21:29:15 -07:00
Eddie Hung
f5170a7eda Removal of more stat calls from tests 2019-08-18 21:28:45 -07:00
Miodrag Milanovic
dbe3cb9708 Ignore all generated headers for pmgen pass 2019-08-18 10:49:17 +02:00
whitequark
98a54353b7
Merge pull request #1290 from YosysHQ/eddie/pr1266_again 
Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER (retry)
 2019-08-18 08:04:26 +00:00
whitequark
101235400c
Merge branch 'master' into eddie/pr1266_again 2019-08-18 08:04:10 +00:00
Clifford Wolf
2a78a1fd00
Merge pull request #1283 from YosysHQ/clifford/fix1255 
Fix various NDEBUG compiler warnings
 2019-08-17 15:07:16 +02:00
Clifford Wolf
ae5d8dc939
Merge pull request #1303 from YosysHQ/bogdanvuk/opt_share 
Implement opt_share from @bogdanvuk
 2019-08-17 15:03:46 +02:00
Clifford Wolf
8915f496d9
Merge pull request #1300 from YosysHQ/eddie/cleanup2 
Use ID::{A,B,Y,keep,blackbox,whitebox} instead of ID()
 2019-08-17 15:01:31 +02:00
Clifford Wolf
27d59dc055 Fix erroneous ifndef-NDEBUG in verific.cc 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-17 14:49:55 +02:00
Clifford Wolf
9e940f1276 Speed up "make test" and related cleanups 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-17 14:37:07 +02:00
Clifford Wolf
f20be90436 Add test for pmtest_test "reduce" demo pattern 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-17 14:05:10 +02:00
Clifford Wolf
f3405fb048 Refactor pmgen rollback mechanism 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-17 13:54:18 +02:00
Clifford Wolf
318ae0351c Improvements in "test_pmgen -generate" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-17 13:53:55 +02:00
Clifford Wolf
f95853c822 Add pmgen "fallthrough" statement 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-08-17 11:29:37 +02:00
Eddie Hung
5abe133323 Use ID() 2019-08-16 16:38:49 -07:00
Eddie Hung
d26c512d7e Add doc for abc_* attributes 2019-08-16 16:07:29 -07:00
Eddie Hung
1c57b1e7ea Update abc_* attr in ecp5 and ice40 2019-08-16 15:56:57 -07:00
Eddie Hung
4fe307f1bc Compute abc_scc_break and move CI/CO outside of each abc9 2019-08-16 15:41:17 -07:00
Eddie Hung
562c9e3624 Attach abc_scc_break, abc_carry_{in,out} attr to ports not modules 2019-08-16 15:40:53 -07:00
Eddie Hung
41191f1ea4
Merge pull request #1250 from bwidawsk/master 
techlibs/intel: Clean up Makefile
 2019-08-16 14:07:09 -07:00
Eddie Hung
3d3779b037 Use ID() macro 2019-08-16 14:01:55 -07:00
Eddie Hung
a29814ca3f Add 'opt_share' to CHANGELOG 2019-08-16 13:47:51 -07:00