Eddie Hung
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ba8ccbdea8
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Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix
abc9/ice40: encapsulate SB_CARRY+SB_LUT4 into one box
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2019-07-16 08:52:14 -07:00 |
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Clifford Wolf
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a1a04ea79c
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Merge pull request #1200 from mmicko/fix_typo_liberty_cc
Fix typo, double "of"
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2019-07-16 15:27:25 +02:00 |
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Clifford Wolf
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928f0a4438
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Merge pull request #1199 from mmicko/extract_fa_fix
Fix check logic in extract_fa
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2019-07-16 15:27:09 +02:00 |
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Miodrag Milanovic
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6cce679b35
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Fix typo, double "of"
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2019-07-16 11:03:30 +02:00 |
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Miodrag Milanovic
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2b469e82a7
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Fix check logic in extract_fa
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2019-07-16 10:35:18 +02:00 |
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Eddie Hung
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87db41a2bb
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Merge pull request #1196 from YosysHQ/eddie/fix1178
Fix different synth results between with and without debug output "-g"
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2019-07-15 13:31:08 -07:00 |
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Eddie Hung
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5fb27c071b
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$__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequark
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2019-07-15 12:03:51 -07:00 |
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Clifford Wolf
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2a7198db51
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Merge pull request #1189 from YosysHQ/eddie/fix1151
Error out if enable > dbits in memory_bram file
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2019-07-15 20:06:35 +02:00 |
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Clifford Wolf
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2c5c53e4c1
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Merge pull request #1190 from YosysHQ/eddie/fix_1099
extract_fa to return nothing more gracefully
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2019-07-15 20:05:56 +02:00 |
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Clifford Wolf
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196c9c22b2
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Merge pull request #1191 from whitequark/opt_lut-log_debug
Make opt_lut less chatty
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2019-07-15 20:04:00 +02:00 |
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Clifford Wolf
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46144f2750
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Merge pull request #1195 from Roman-Parise/master
Updated FreeBSD dependencies in README.md
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2019-07-15 20:01:38 +02:00 |
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Clifford Wolf
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bf8bb54c1a
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Merge pull request #1197 from nakengelhardt/handle-setrlimit-fail
smt: handle failure of setrlimit syscall
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2019-07-15 19:42:11 +02:00 |
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Eddie Hung
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06f94c92d4
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Revert "Add log_checkpoint function and use it in opt_muxtree"
This reverts commit 0e6c83027f.
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2019-07-15 08:35:48 -07:00 |
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N. Engelhardt
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ab4b9e8db4
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smt: handle failure of setrlimit syscall
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2019-07-15 23:33:18 +08:00 |
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Eddie Hung
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78560aac86
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Revert "Fix first divergence in #1178"
This reverts commit 1122a2e067.
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2019-07-15 08:31:26 -07:00 |
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Eddie Hung
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7129a03083
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Merge branch 'master' into eddie/fix1178
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2019-07-15 08:23:01 -07:00 |
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Clifford Wolf
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44fd459c79
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Redesign log_id_cache so that it doesn't keep IdString instances referenced, fixes #1178
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-07-15 17:10:42 +02:00 |
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Clifford Wolf
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0e6c83027f
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Add log_checkpoint function and use it in opt_muxtree
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-07-15 12:12:21 +02:00 |
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Eddie Hung
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a97d30d2f8
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Merge pull request #1194 from cr1901/miss-semi
Fix missing semicolon in Windows-specific code in aigerparse.cc.
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2019-07-14 13:36:34 -07:00 |
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William D. Jones
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da5d64d71e
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Fix missing semicolon in Windows-specific code in aigerparse.cc.
Signed-off-by: William D. Jones <thor0505@comcast.net>
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2019-07-14 13:52:27 -04:00 |
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Roman-Parise
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f7ab7a418c
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Updated FreeBSD dependencies in README.md
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2019-07-14 09:25:07 -07:00 |
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whitequark
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2de7e92bb8
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opt_lut: make less chatty.
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2019-07-13 16:49:56 +00:00 |
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Eddie Hung
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9b91d815b5
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If ConstEval fails do not log_abort() but return gracefully
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2019-07-13 04:13:57 -07:00 |
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Eddie Hung
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ab3917d079
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Error out if enable > dbits
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2019-07-13 03:39:23 -07:00 |
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Eddie Hung
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d032198fac
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ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT
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2019-07-13 01:11:00 -07:00 |
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Eddie Hung
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7dc15bdd2d
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Do not double count cells in abc
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2019-07-12 08:22:26 -07:00 |
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Clifford Wolf
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463f710066
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Merge pull request #1183 from whitequark/ice40-always-relut
synth_ice40: switch -relut to be always on
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2019-07-12 10:48:00 +02:00 |
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Eddie Hung
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7a912f22b2
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Use Const::from_string() not its constructor...
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2019-07-12 01:32:10 -07:00 |
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Eddie Hung
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28274dfb09
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Off by one
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2019-07-12 01:17:53 -07:00 |
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Eddie Hung
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e0e5d7d68e
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Fix spacing
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2019-07-12 01:15:22 -07:00 |
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Eddie Hung
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4de03bd5e6
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Remove double push
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2019-07-12 01:08:48 -07:00 |
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Eddie Hung
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62ac5ebd02
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Map to and from this box if -abc9
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2019-07-12 00:53:01 -07:00 |
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Eddie Hung
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0f5bddcd79
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ice40_opt to handle this box and opt back to SB_LUT4
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2019-07-12 00:52:31 -07:00 |
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Eddie Hung
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a79ff2501e
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Add new box to cells_sim.v
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2019-07-12 00:52:19 -07:00 |
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Eddie Hung
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c6e16e1334
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_ABC macro will map and unmap to this new box
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2019-07-12 00:51:37 -07:00 |
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Eddie Hung
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fc3d74616f
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Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 box
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2019-07-12 00:50:42 -07:00 |
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whitequark
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b700a4b1c5
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synth_ice40: switch -relut to be always on.
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2019-07-11 20:18:41 +00:00 |
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whitequark
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a8c5f7f41e
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synth_ice40: fix help text typo. NFC.
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2019-07-11 20:18:41 +00:00 |
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Eddie Hung
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19c1c3cfa3
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Merge pull request #1182 from koriakin/xc6s-bram
synth_xilinx: Initial Spartan 6 block RAM inference support.
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2019-07-11 12:55:35 -07:00 |
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Eddie Hung
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931adbaf74
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Merge pull request #1185 from koriakin/xc-ff-init-vals
xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Vivado.
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2019-07-11 12:55:14 -07:00 |
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Marcin Kościelnicki
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a9efacd01d
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xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Vivado.
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2019-07-11 21:13:12 +02:00 |
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Eddie Hung
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c0abd18799
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Enable &mfs for abc9, even if it only currently works for ice40
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2019-07-11 08:49:06 -07:00 |
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Marcin Kościelnicki
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ce250b341c
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synth_xilinx: Initial Spartan 6 block RAM inference support.
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2019-07-11 14:45:48 +02:00 |
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Clifford Wolf
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9112850800
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Merge pull request #1172 from whitequark/write_verilog-Sa-as-qmark
write_verilog: write RTLIL::Sa aka - as Verilog ?
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2019-07-11 07:25:52 +02:00 |
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Clifford Wolf
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fd3d5cefad
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Merge pull request #1179 from whitequark/attrmap-proc
attrmap: also consider process, switch and case attributes
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2019-07-11 07:23:28 +02:00 |
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Eddie Hung
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bb2144ae73
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Merge pull request #1180 from YosysHQ/eddie/no_abc9_retime
Error out if -abc9 and -retime specified
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2019-07-10 14:38:13 -07:00 |
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Eddie Hung
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2f990a7319
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Merge pull request #1148 from YosysHQ/xc7mux
synth_xilinx to infer wide multiplexers using new '-widemux <min>' option
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2019-07-10 14:38:00 -07:00 |
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Eddie Hung
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6bbd286e03
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Error out if -abc9 and -retime specified
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2019-07-10 12:47:48 -07:00 |
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Eddie Hung
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58bb84e5b2
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Add some spacing
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2019-07-10 12:32:33 -07:00 |
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Eddie Hung
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521971e32e
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Add some ASCII art explaining mux decomposition
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2019-07-10 12:20:04 -07:00 |
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